Gecko [ tsuru-no-tsurugi.tokyo ]

Name	Size	Permission	Date
amba	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
atomic	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
avf	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
bcma	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
byteorder	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
can	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
ceph	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
clk	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
crush	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
decompress	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
device	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
dma	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
dsa	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
extcon	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
firmware	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
fpga	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
fsl	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
gpio	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
greybus	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
hsi	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
i3c	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
iio	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
input	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
irqchip	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
isdn	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
lockd	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
mailbox	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
mdio	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
mfd	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
mlx4	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
mlx5	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
mmc	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
mtd	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
mux	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
net	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
netfilter	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
netfilter_arp	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
netfilter_bridge	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
netfilter_ipv4	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
netfilter_ipv6	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
pcs	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
perf	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
phy	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
pinctrl	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
platform_data	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
power	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
qed	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
raid	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
regulator	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
remoteproc	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
reset	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
rpmsg	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
rtc	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
sched	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
soc	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
soundwire	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
spi	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
ssb	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
sunrpc	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
surface_aggregator	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
ulpi	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
unaligned	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
usb	[ DIR ]	drwxr-xr-x	2026-07-21 06:37
8250_pci.h	1.01 KB	-rw-r--r--	2021-11-01 05:53
a.out.h	354 B	-rw-r--r--	2021-11-01 05:53
acct.h	2.49 KB	-rw-r--r--	2021-11-01 05:53
acpi.h	39.94 KB	-rw-r--r--	2026-06-21 00:49
acpi_dma.h	3.08 KB	-rw-r--r--	2021-11-01 05:53
acpi_iort.h	2.35 KB	-rw-r--r--	2026-06-21 00:49
acpi_mdio.h	819 B	-rw-r--r--	2026-06-21 00:49
acpi_pmtmr.h	674 B	-rw-r--r--	2021-11-01 05:53
acpi_viot.h	478 B	-rw-r--r--	2026-06-21 00:49
adb.h	1.79 KB	-rw-r--r--	2021-11-01 05:53
adfs_fs.h	574 B	-rw-r--r--	2021-11-01 05:53
adreno-smmu-priv.h	2.74 KB	-rw-r--r--	2021-11-01 05:53
adxl.h	310 B	-rw-r--r--	2021-11-01 05:53
aer.h	1.78 KB	-rw-r--r--	2021-11-01 05:53
agp_backend.h	3.45 KB	-rw-r--r--	2021-11-01 05:53
agpgart.h	3.79 KB	-rw-r--r--	2021-11-01 05:53
ahci-remap.h	607 B	-rw-r--r--	2021-11-01 05:53
ahci_platform.h	1.71 KB	-rw-r--r--	2026-06-21 00:49
aio.h	651 B	-rw-r--r--	2021-11-01 05:53
alarmtimer.h	1.94 KB	-rw-r--r--	2021-11-01 05:53
alcor_pci.h	8.83 KB	-rw-r--r--	2021-11-01 05:53
align.h	552 B	-rw-r--r--	2021-11-01 05:53
altera_jtaguart.h	379 B	-rw-r--r--	2021-11-01 05:53
altera_uart.h	397 B	-rw-r--r--	2021-11-01 05:53
amd-iommu.h	6.18 KB	-rw-r--r--	2021-11-01 05:53
anon_inodes.h	670 B	-rw-r--r--	2021-11-01 05:53
apm-emulation.h	1.56 KB	-rw-r--r--	2021-11-01 05:53
apm_bios.h	2.25 KB	-rw-r--r--	2021-11-01 05:53
apple-gmux.h	918 B	-rw-r--r--	2021-11-01 05:53
apple_bl.h	498 B	-rw-r--r--	2021-11-01 05:53
arch_topology.h	2.49 KB	-rw-r--r--	2021-11-01 05:53
arm-cci.h	1.36 KB	-rw-r--r--	2021-11-01 05:53
arm-smccc.h	16.97 KB	-rw-r--r--	2026-06-21 00:49
arm_ffa.h	7.37 KB	-rw-r--r--	2026-06-21 00:49
arm_sdei.h	2.67 KB	-rw-r--r--	2026-06-21 00:49
armada-37xx-rwtm-mailbox.h	431 B	-rw-r--r--	2021-11-01 05:53
array_size.h	332 B	-rw-r--r--	2026-06-21 00:49
ascii85.h	555 B	-rw-r--r--	2021-11-01 05:53
asn1.h	1.79 KB	-rw-r--r--	2021-11-01 05:53
asn1_ber_bytecode.h	2.52 KB	-rw-r--r--	2021-11-01 05:53
asn1_decoder.h	468 B	-rw-r--r--	2021-11-01 05:53
asn1_encoder.h	1006 B	-rw-r--r--	2021-11-01 05:53
assoc_array.h	2.88 KB	-rw-r--r--	2021-11-01 05:53
assoc_array_priv.h	5.3 KB	-rw-r--r--	2021-11-01 05:53
async.h	4.33 KB	-rw-r--r--	2026-06-21 00:49
async_tx.h	6.7 KB	-rw-r--r--	2021-11-01 05:53
ata.h	33.01 KB	-rw-r--r--	2026-06-21 00:49
ata_platform.h	749 B	-rw-r--r--	2021-11-01 05:53
atalk.h	4.48 KB	-rw-r--r--	2021-11-01 05:53
ath9k_platform.h	1.44 KB	-rw-r--r--	2021-11-01 05:53
atm.h	287 B	-rw-r--r--	2021-11-01 05:53
atm_tcp.h	511 B	-rw-r--r--	2021-11-01 05:53
atmdev.h	10.23 KB	-rw-r--r--	2026-06-21 00:49
atmel-isc-media.h	2.07 KB	-rw-r--r--	2021-11-01 05:53
atmel-mci.h	1.4 KB	-rw-r--r--	2021-11-01 05:53
atmel-ssc.h	9.74 KB	-rw-r--r--	2021-11-01 05:53
atmel_pdc.h	1.26 KB	-rw-r--r--	2021-11-01 05:53
atomic.h	2.58 KB	-rw-r--r--	2021-11-01 05:53
attribute_container.h	2.74 KB	-rw-r--r--	2021-11-01 05:53
audit.h	19.45 KB	-rw-r--r--	2026-06-21 00:49
auto_dev-ioctl.h	296 B	-rw-r--r--	2021-11-01 05:53
auto_fs.h	278 B	-rw-r--r--	2021-11-01 05:53
auxiliary_bus.h	2.48 KB	-rw-r--r--	2021-11-01 05:53
auxvec.h	304 B	-rw-r--r--	2021-11-01 05:53
average.h	2.42 KB	-rw-r--r--	2021-11-01 05:53
backing-dev-defs.h	8.55 KB	-rw-r--r--	2021-11-01 05:53
backing-dev.h	11.9 KB	-rw-r--r--	2026-06-21 00:49
backlight.h	13.13 KB	-rw-r--r--	2021-11-01 05:53
badblocks.h	2.14 KB	-rw-r--r--	2021-11-01 05:53
balloon_compaction.h	5.75 KB	-rw-r--r--	2026-06-21 00:49
bcd.h	559 B	-rw-r--r--	2021-11-01 05:53
bch.h	2.1 KB	-rw-r--r--	2021-11-01 05:53
bcm47xx_nvram.h	1.01 KB	-rw-r--r--	2021-11-01 05:53
bcm47xx_sprom.h	616 B	-rw-r--r--	2021-11-01 05:53
bcm47xx_wdt.h	555 B	-rw-r--r--	2021-11-01 05:53
bcm963xx_nvram.h	2.96 KB	-rw-r--r--	2021-11-01 05:53
bcm963xx_tag.h	3.6 KB	-rw-r--r--	2021-11-01 05:53
binfmts.h	4.57 KB	-rw-r--r--	2026-06-21 00:49
bio.h	19.64 KB	-rw-r--r--	2021-11-01 05:53
bit_spinlock.h	2.3 KB	-rw-r--r--	2021-11-01 05:53
bitfield.h	5.33 KB	-rw-r--r--	2026-06-21 00:49
bitmap.h	22.13 KB	-rw-r--r--	2026-06-21 00:49
bitops.h	8.53 KB	-rw-r--r--	2021-11-01 05:53
bitrev.h	2.53 KB	-rw-r--r--	2021-11-01 05:53
bits.h	1.35 KB	-rw-r--r--	2021-11-01 05:53
blk-cgroup.h	22.12 KB	-rw-r--r--	2026-06-21 00:49
blk-crypto.h	4.02 KB	-rw-r--r--	2026-06-21 00:49
blk-mq-pci.h	269 B	-rw-r--r--	2021-11-01 05:53
blk-mq-rdma.h	273 B	-rw-r--r--	2021-11-01 05:53
blk-mq-virtio.h	293 B	-rw-r--r--	2021-11-01 05:53
blk-mq.h	19.37 KB	-rw-r--r--	2021-11-01 05:53
blk-pm.h	708 B	-rw-r--r--	2026-06-21 00:49
blk_types.h	15.3 KB	-rw-r--r--	2026-06-21 00:49
blkdev.h	56.68 KB	-rw-r--r--	2026-06-21 00:49
blkpg.h	436 B	-rw-r--r--	2021-11-01 05:53
blktrace_api.h	3.77 KB	-rw-r--r--	2021-11-01 05:53
blockgroup_lock.h	810 B	-rw-r--r--	2021-11-01 05:53
bma150.h	1.26 KB	-rw-r--r--	2021-11-01 05:53
bootconfig.h	8.51 KB	-rw-r--r--	2026-06-21 00:49
bootmem_info.h	1.69 KB	-rw-r--r--	2026-06-21 00:49
bottom_half.h	974 B	-rw-r--r--	2021-11-01 05:53
bpf-cgroup.h	18.36 KB	-rw-r--r--	2026-06-21 00:49
bpf-netns.h	1.52 KB	-rw-r--r--	2021-11-01 05:53
bpf.h	74.43 KB	-rw-r--r--	2026-06-21 00:49
bpf_lirc.h	698 B	-rw-r--r--	2021-11-01 05:53
bpf_local_storage.h	5.23 KB	-rw-r--r--	2021-11-01 05:53
bpf_lsm.h	1.42 KB	-rw-r--r--	2021-11-01 05:53
bpf_trace.h	166 B	-rw-r--r--	2021-11-01 05:53
bpf_types.h	5.41 KB	-rw-r--r--	2021-11-01 05:53
bpf_verifier.h	20.38 KB	-rw-r--r--	2026-06-21 00:49
bpfilter.h	791 B	-rw-r--r--	2021-11-01 05:53
bpfptr.h	1.98 KB	-rw-r--r--	2026-06-21 00:49
brcmphy.h	13.67 KB	-rw-r--r--	2021-11-01 05:53
bsearch.h	624 B	-rw-r--r--	2021-11-01 05:53
bsg-lib.h	1.72 KB	-rw-r--r--	2021-11-01 05:53
bsg.h	492 B	-rw-r--r--	2021-11-01 05:53
btf.h	7.26 KB	-rw-r--r--	2021-11-01 05:53
btf_ids.h	5.33 KB	-rw-r--r--	2026-06-21 00:49
btree-128.h	2.67 KB	-rw-r--r--	2021-11-01 05:53
btree-type.h	3.9 KB	-rw-r--r--	2021-11-01 05:53
btree.h	6.84 KB	-rw-r--r--	2021-11-01 05:53
btrfs.h	145 B	-rw-r--r--	2021-11-01 05:53
buffer_head.h	14.47 KB	-rw-r--r--	2026-06-21 00:49
bug.h	2.17 KB	-rw-r--r--	2021-11-01 05:53
build-salt.h	375 B	-rw-r--r--	2021-11-01 05:53
build_bug.h	2.76 KB	-rw-r--r--	2021-11-01 05:53
buildid.h	561 B	-rw-r--r--	2021-11-01 05:53
bvec.h	6.17 KB	-rw-r--r--	2021-11-01 05:53
c2port.h	1.35 KB	-rw-r--r--	2021-11-01 05:53
cache.h	2.55 KB	-rw-r--r--	2021-11-01 05:53
cacheinfo.h	3.75 KB	-rw-r--r--	2021-11-01 05:53
capability.h	8.29 KB	-rw-r--r--	2021-11-01 05:53
cb710.h	5.36 KB	-rw-r--r--	2021-11-01 05:53
cc_platform.h	2.32 KB	-rw-r--r--	2026-06-21 00:49
cciss_ioctl.h	1.03 KB	-rw-r--r--	2021-11-01 05:53
ccp.h	18.14 KB	-rw-r--r--	2021-11-01 05:53
cdev.h	845 B	-rw-r--r--	2021-11-01 05:53
cdrom.h	9.05 KB	-rw-r--r--	2026-06-21 00:49
cfag12864b.h	1.47 KB	-rw-r--r--	2021-11-01 05:53
cfi.h	1.13 KB	-rw-r--r--	2021-11-01 05:53
cgroup-defs.h	24.23 KB	-rw-r--r--	2026-06-21 00:49
cgroup.h	28.16 KB	-rw-r--r--	2026-06-21 00:49
cgroup_rdma.h	1.18 KB	-rw-r--r--	2021-11-01 05:53
cgroup_subsys.h	1.23 KB	-rw-r--r--	2021-11-01 05:53
circ_buf.h	1.09 KB	-rw-r--r--	2021-11-01 05:53
cleancache.h	3.89 KB	-rw-r--r--	2021-11-01 05:53
cleanup.h	4.87 KB	-rw-r--r--	2026-06-21 00:49
clk-provider.h	57.94 KB	-rw-r--r--	2026-06-21 00:49
clk.h	33.61 KB	-rw-r--r--	2026-06-21 00:49
clkdev.h	1.29 KB	-rw-r--r--	2021-11-01 05:53
clockchips.h	7.27 KB	-rw-r--r--	2021-11-01 05:53
clocksource.h	9.99 KB	-rw-r--r--	2026-06-21 00:49
clocksource_ids.h	247 B	-rw-r--r--	2021-11-01 05:53
cm4000_cs.h	199 B	-rw-r--r--	2021-11-01 05:53
cma.h	1.96 KB	-rw-r--r--	2026-06-21 00:49
cn_proc.h	1.85 KB	-rw-r--r--	2021-11-01 05:53
cnt32_to_63.h	3.46 KB	-rw-r--r--	2021-11-01 05:53
coda.h	2.16 KB	-rw-r--r--	2021-11-01 05:53
compaction.h	7.15 KB	-rw-r--r--	2021-11-01 05:53
compat.h	31.37 KB	-rw-r--r--	2026-06-21 00:49
compiler-clang.h	4.05 KB	-rw-r--r--	2026-06-21 00:49
compiler-gcc.h	4.9 KB	-rw-r--r--	2026-06-21 00:49
compiler-intel.h	949 B	-rw-r--r--	2021-11-01 05:53
compiler-version.h	517 B	-rw-r--r--	2021-11-01 05:53
compiler.h	8.35 KB	-rw-r--r--	2026-06-21 00:49
compiler_attributes.h	13.24 KB	-rw-r--r--	2026-06-21 00:49
compiler_types.h	10.76 KB	-rw-r--r--	2026-06-21 00:49
completion.h	4 KB	-rw-r--r--	2021-11-01 05:53
component.h	4.07 KB	-rw-r--r--	2021-11-01 05:53
configfs.h	8.48 KB	-rw-r--r--	2021-11-01 05:53
connector.h	3.83 KB	-rw-r--r--	2021-11-01 05:53
console.h	7.58 KB	-rw-r--r--	2026-06-21 00:49
console_struct.h	7.08 KB	-rw-r--r--	2026-06-21 00:49
consolemap.h	1.05 KB	-rw-r--r--	2021-11-01 05:53
const.h	421 B	-rw-r--r--	2021-11-01 05:53
container.h	610 B	-rw-r--r--	2021-11-01 05:53
context_tracking.h	3.28 KB	-rw-r--r--	2021-11-01 05:53
context_tracking_state.h	1.58 KB	-rw-r--r--	2021-11-01 05:53
cookie.h	1.22 KB	-rw-r--r--	2021-11-01 05:53
cordic.h	2.08 KB	-rw-r--r--	2021-11-01 05:53
coredump.h	1.13 KB	-rw-r--r--	2026-06-21 00:49
coresight-pmu.h	1.32 KB	-rw-r--r--	2021-11-01 05:53
coresight-stm.h	152 B	-rw-r--r--	2021-11-01 05:53
coresight.h	18.02 KB	-rw-r--r--	2026-06-21 00:49
count_zeros.h	1.42 KB	-rw-r--r--	2021-11-01 05:53
counter.h	14.96 KB	-rw-r--r--	2026-06-21 00:49
cper.h	16.57 KB	-rw-r--r--	2026-06-21 00:49
cpu.h	8.29 KB	-rw-r--r--	2026-06-21 00:49
cpu_cooling.h	1.86 KB	-rw-r--r--	2021-11-01 05:53
cpu_pm.h	2.38 KB	-rw-r--r--	2021-11-01 05:53
cpu_rmap.h	1.68 KB	-rw-r--r--	2021-11-01 05:53
cpufeature.h	1.71 KB	-rw-r--r--	2021-11-01 05:53
cpufreq.h	32.75 KB	-rw-r--r--	2026-06-21 00:49
cpuhotplug.h	16.55 KB	-rw-r--r--	2026-06-21 00:49
cpuidle.h	10.27 KB	-rw-r--r--	2021-11-01 05:53
cpuidle_haltpoll.h	312 B	-rw-r--r--	2021-11-01 05:53
cpumask.h	29.38 KB	-rw-r--r--	2026-06-21 00:49
cpuset.h	8.16 KB	-rw-r--r--	2026-06-21 00:49
crash_core.h	3.38 KB	-rw-r--r--	2021-11-01 05:53
crash_dump.h	4.05 KB	-rw-r--r--	2021-11-01 05:53
crc-ccitt.h	609 B	-rw-r--r--	2021-11-01 05:53
crc-itu-t.h	531 B	-rw-r--r--	2021-11-01 05:53
crc-t10dif.h	453 B	-rw-r--r--	2021-11-01 05:53
crc16.h	540 B	-rw-r--r--	2021-11-01 05:53
crc32.h	2.83 KB	-rw-r--r--	2021-11-01 05:53
crc32c.h	331 B	-rw-r--r--	2021-11-01 05:53
crc32poly.h	610 B	-rw-r--r--	2021-11-01 05:53
crc4.h	192 B	-rw-r--r--	2021-11-01 05:53
crc64.h	280 B	-rw-r--r--	2021-11-01 05:53
crc7.h	316 B	-rw-r--r--	2021-11-01 05:53
crc8.h	3.66 KB	-rw-r--r--	2021-11-01 05:53
cred.h	12.5 KB	-rw-r--r--	2026-06-21 00:49
crypto.h	27.24 KB	-rw-r--r--	2026-06-21 00:49
cs5535.h	6.13 KB	-rw-r--r--	2021-11-01 05:53
ctype.h	1.87 KB	-rw-r--r--	2021-11-01 05:53
cuda.h	613 B	-rw-r--r--	2021-11-01 05:53
damon.h	10.35 KB	-rw-r--r--	2021-11-01 05:53
dasd_mod.h	204 B	-rw-r--r--	2021-11-01 05:53
davinci_emac.h	1.05 KB	-rw-r--r--	2021-11-01 05:53
dax.h	6.56 KB	-rw-r--r--	2021-11-01 05:53
dca.h	1.88 KB	-rw-r--r--	2021-11-01 05:53
dcache.h	18.63 KB	-rw-r--r--	2021-11-01 05:53
dccp.h	10.73 KB	-rw-r--r--	2021-11-01 05:53
debug_locks.h	1.59 KB	-rw-r--r--	2021-11-01 05:53
debugfs.h	11.97 KB	-rw-r--r--	2026-06-21 00:49
debugobjects.h	3.99 KB	-rw-r--r--	2021-11-01 05:53
delay.h	2.43 KB	-rw-r--r--	2026-06-21 00:49
delayacct.h	5.45 KB	-rw-r--r--	2021-11-01 05:53
delayed_call.h	709 B	-rw-r--r--	2021-11-01 05:53
dev_printk.h	9.65 KB	-rw-r--r--	2026-06-21 00:49
devcoredump.h	2.21 KB	-rw-r--r--	2021-11-01 05:53
devfreq-event.h	5.95 KB	-rw-r--r--	2021-11-01 05:53
devfreq.h	14.03 KB	-rw-r--r--	2026-06-21 00:49
devfreq_cooling.h	2.7 KB	-rw-r--r--	2021-11-01 05:53
device-mapper.h	18.92 KB	-rw-r--r--	2021-11-01 05:53
device.h	34.4 KB	-rw-r--r--	2026-06-21 00:49
device_cgroup.h	1.57 KB	-rw-r--r--	2021-11-01 05:53
devm-helpers.h	2.68 KB	-rw-r--r--	2021-11-01 05:53
devpts_fs.h	1.13 KB	-rw-r--r--	2021-11-01 05:53
dfl.h	2.38 KB	-rw-r--r--	2021-11-01 05:53
digsig.h	1.18 KB	-rw-r--r--	2021-11-01 05:53
dim.h	9.2 KB	-rw-r--r--	2026-06-21 00:49
dio.h	10.76 KB	-rw-r--r--	2021-11-01 05:53
dirent.h	215 B	-rw-r--r--	2021-11-01 05:53
dlm.h	5.86 KB	-rw-r--r--	2021-11-01 05:53
dlm_plock.h	532 B	-rw-r--r--	2021-11-01 05:53
dm-bufio.h	4.88 KB	-rw-r--r--	2021-11-01 05:53
dm-dirty-log.h	3.94 KB	-rw-r--r--	2021-11-01 05:53
dm-io.h	1.93 KB	-rw-r--r--	2021-11-01 05:53
dm-kcopyd.h	2.94 KB	-rw-r--r--	2021-11-01 05:53
dm-region-hash.h	3.11 KB	-rw-r--r--	2021-11-01 05:53
dm9000.h	987 B	-rw-r--r--	2021-11-01 05:53
dma-buf-map.h	8.12 KB	-rw-r--r--	2021-11-01 05:53
dma-buf.h	20.47 KB	-rw-r--r--	2026-06-21 00:49
dma-direct.h	3.59 KB	-rw-r--r--	2021-11-01 05:53
dma-direction.h	407 B	-rw-r--r--	2021-11-01 05:53
dma-fence-array.h	2.14 KB	-rw-r--r--	2021-11-01 05:53
dma-fence-chain.h	3.07 KB	-rw-r--r--	2021-11-01 05:53
dma-fence.h	20.86 KB	-rw-r--r--	2026-06-21 00:49
dma-heap.h	1.58 KB	-rw-r--r--	2021-11-01 05:53
dma-iommu.h	2.21 KB	-rw-r--r--	2021-11-01 05:53
dma-map-ops.h	12.89 KB	-rw-r--r--	2026-06-21 00:49
dma-mapping.h	20.11 KB	-rw-r--r--	2026-06-21 00:49
dma-resv.h	11.95 KB	-rw-r--r--	2026-06-21 00:49
dmaengine.h	53.57 KB	-rw-r--r--	2026-06-21 00:49
dmapool.h	1.79 KB	-rw-r--r--	2021-11-01 05:53
dmar.h	7.74 KB	-rw-r--r--	2021-11-01 05:53
dmi.h	4.41 KB	-rw-r--r--	2026-06-21 00:49
dnotify.h	1.02 KB	-rw-r--r--	2026-06-21 00:49
dns_resolver.h	1.36 KB	-rw-r--r--	2021-11-01 05:53
dqblk_qtree.h	2.19 KB	-rw-r--r--	2021-11-01 05:53
dqblk_v1.h	327 B	-rw-r--r--	2021-11-01 05:53
dqblk_v2.h	406 B	-rw-r--r--	2021-11-01 05:53
drbd.h	10.07 KB	-rw-r--r--	2021-11-01 05:53
drbd_genl.h	21.49 KB	-rw-r--r--	2021-11-01 05:53
drbd_genl_api.h	1.77 KB	-rw-r--r--	2021-11-01 05:53
drbd_limits.h	7.82 KB	-rw-r--r--	2021-11-01 05:53
ds2782_battery.h	158 B	-rw-r--r--	2021-11-01 05:53
dtlk.h	3.5 KB	-rw-r--r--	2021-11-01 05:53
dtpm.h	1.64 KB	-rw-r--r--	2021-11-01 05:53
dw_apb_timer.h	1.53 KB	-rw-r--r--	2021-11-01 05:53
dynamic_debug.h	6.32 KB	-rw-r--r--	2026-06-21 00:49
dynamic_queue_limits.h	3.72 KB	-rw-r--r--	2021-11-01 05:53
earlycpio.h	359 B	-rw-r--r--	2021-11-01 05:53
ecryptfs.h	3.82 KB	-rw-r--r--	2021-11-01 05:53
edac.h	19.46 KB	-rw-r--r--	2026-06-21 00:49
edd.h	1.05 KB	-rw-r--r--	2021-11-01 05:53
eeprom_93cx6.h	2.64 KB	-rw-r--r--	2026-06-21 00:49
eeprom_93xx46.h	1.04 KB	-rw-r--r--	2021-11-01 05:53
efi-bgrt.h	644 B	-rw-r--r--	2021-11-01 05:53
efi.h	42.03 KB	-rw-r--r--	2026-06-21 00:49
efi_embedded_fw.h	1.04 KB	-rw-r--r--	2021-11-01 05:53
efs_vh.h	1.55 KB	-rw-r--r--	2021-11-01 05:53
eisa.h	2.96 KB	-rw-r--r--	2021-11-01 05:53
elevator.h	5.52 KB	-rw-r--r--	2021-11-01 05:53
elf-fdpic.h	1.98 KB	-rw-r--r--	2021-11-01 05:53
elf-randomize.h	583 B	-rw-r--r--	2021-11-01 05:53
elf.h	2.96 KB	-rw-r--r--	2021-11-01 05:53
elfcore-compat.h	1.27 KB	-rw-r--r--	2021-11-01 05:53
elfcore.h	4.11 KB	-rw-r--r--	2021-11-01 05:53
elfnote-lto.h	314 B	-rw-r--r--	2021-11-01 05:53
elfnote.h	3.54 KB	-rw-r--r--	2021-11-01 05:53
enclosure.h	4.02 KB	-rw-r--r--	2021-11-01 05:53
energy_model.h	8.17 KB	-rw-r--r--	2021-11-01 05:53
entry-common.h	16.95 KB	-rw-r--r--	2021-11-01 05:53
entry-kvm.h	2.73 KB	-rw-r--r--	2026-06-21 00:49
err.h	1.49 KB	-rw-r--r--	2021-11-01 05:53
errname.h	283 B	-rw-r--r--	2021-11-01 05:53
errno.h	1.45 KB	-rw-r--r--	2021-11-01 05:53
error-injection.h	607 B	-rw-r--r--	2021-11-01 05:53
errqueue.h	524 B	-rw-r--r--	2021-11-01 05:53
errseq.h	382 B	-rw-r--r--	2021-11-01 05:53
etherdevice.h	17.19 KB	-rw-r--r--	2026-06-21 00:49
ethtool.h	31.74 KB	-rw-r--r--	2026-06-21 00:49
ethtool_netlink.h	1.98 KB	-rw-r--r--	2026-06-21 00:49
eventfd.h	2.28 KB	-rw-r--r--	2026-06-21 00:49
eventpoll.h	2.41 KB	-rw-r--r--	2026-06-21 00:49
evm.h	3.42 KB	-rw-r--r--	2021-11-01 05:53
export.h	5.27 KB	-rw-r--r--	2026-06-21 00:49
exportfs.h	8.22 KB	-rw-r--r--	2026-06-21 00:49
ext2_fs.h	967 B	-rw-r--r--	2021-11-01 05:53
extable.h	1.28 KB	-rw-r--r--	2021-11-01 05:53
extcon-provider.h	3.83 KB	-rw-r--r--	2021-11-01 05:53
extcon.h	10.16 KB	-rw-r--r--	2026-06-21 00:49
f2fs_fs.h	19.01 KB	-rw-r--r--	2026-06-21 00:49
f75375s.h	541 B	-rw-r--r--	2021-11-01 05:53
falloc.h	1.59 KB	-rw-r--r--	2021-11-01 05:53
fanotify.h	4.44 KB	-rw-r--r--	2026-06-21 00:49
fault-inject-usercopy.h	496 B	-rw-r--r--	2021-11-01 05:53
fault-inject.h	1.93 KB	-rw-r--r--	2021-11-01 05:53
fb.h	28.28 KB	-rw-r--r--	2026-06-21 00:49
fbcon.h	2.2 KB	-rw-r--r--	2026-06-21 00:49
fcdevice.h	774 B	-rw-r--r--	2021-11-01 05:53
fcntl.h	1.66 KB	-rw-r--r--	2021-11-01 05:53
fd.h	490 B	-rw-r--r--	2021-11-01 05:53
fddidevice.h	833 B	-rw-r--r--	2021-11-01 05:53
fdtable.h	3.49 KB	-rw-r--r--	2026-06-21 00:49
fec.h	463 B	-rw-r--r--	2021-11-01 05:53
fiemap.h	713 B	-rw-r--r--	2021-11-01 05:53
file.h	3.08 KB	-rw-r--r--	2026-06-21 00:49
fileattr.h	1.91 KB	-rw-r--r--	2021-11-01 05:53
filter.h	42.96 KB	-rw-r--r--	2026-06-21 00:49
fips.h	303 B	-rw-r--r--	2021-11-01 05:53
firewire.h	13.4 KB	-rw-r--r--	2021-11-01 05:53
firmware-map.h	959 B	-rw-r--r--	2021-11-01 05:53
firmware.h	3.27 KB	-rw-r--r--	2021-11-01 05:53
fixp-arith.h	4.19 KB	-rw-r--r--	2021-11-01 05:53
flat.h	2.57 KB	-rw-r--r--	2021-11-01 05:53
flex_proportions.h	2.81 KB	-rw-r--r--	2021-11-01 05:53
font.h	1.67 KB	-rw-r--r--	2021-11-01 05:53
fortify-string.h	9.11 KB	-rw-r--r--	2026-06-21 00:49
freelist.h	3.8 KB	-rw-r--r--	2021-11-01 05:53
freezer.h	8.98 KB	-rw-r--r--	2021-11-01 05:53
frontswap.h	3.04 KB	-rw-r--r--	2021-11-01 05:53
fs.h	122.56 KB	-rw-r--r--	2026-06-21 00:49
fs_context.h	8.61 KB	-rw-r--r--	2026-06-21 00:49
fs_enet_pd.h	3.38 KB	-rw-r--r--	2021-11-01 05:53
fs_parser.h	4.44 KB	-rw-r--r--	2021-11-01 05:53
fs_pin.h	539 B	-rw-r--r--	2021-11-01 05:53
fs_stack.h	811 B	-rw-r--r--	2021-11-01 05:53
fs_struct.h	1.04 KB	-rw-r--r--	2021-11-01 05:53
fs_types.h	2.02 KB	-rw-r--r--	2021-11-01 05:53
fs_uart_pd.h	1.49 KB	-rw-r--r--	2021-11-01 05:53
fscache-cache.h	18.58 KB	-rw-r--r--	2021-11-01 05:53
fscache.h	29.59 KB	-rw-r--r--	2026-06-21 00:49
fscrypt.h	29.9 KB	-rw-r--r--	2026-06-21 00:49
fsi-occ.h	681 B	-rw-r--r--	2021-11-01 05:53
fsi-sbefifo.h	629 B	-rw-r--r--	2021-11-01 05:53
fsi.h	2.26 KB	-rw-r--r--	2021-11-01 05:53
fsl-diu-fb.h	3.87 KB	-rw-r--r--	2021-11-01 05:53
fsl_devices.h	4.16 KB	-rw-r--r--	2021-11-01 05:53
fsl_hypervisor.h	2.76 KB	-rw-r--r--	2021-11-01 05:53
fsl_ifc.h	24.48 KB	-rw-r--r--	2021-11-01 05:53
fsldma.h	202 B	-rw-r--r--	2021-11-01 05:53
fsnotify.h	10.05 KB	-rw-r--r--	2026-06-21 00:49
fsnotify_backend.h	29.37 KB	-rw-r--r--	2026-06-21 00:49
fsverity.h	6.75 KB	-rw-r--r--	2021-11-01 05:53
ftrace.h	34.76 KB	-rw-r--r--	2026-06-21 00:49
ftrace_irq.h	884 B	-rw-r--r--	2021-11-01 05:53
futex.h	2.44 KB	-rw-r--r--	2021-11-01 05:53
fwnode.h	7.36 KB	-rw-r--r--	2026-06-21 00:49
fwnode_mdio.h	858 B	-rw-r--r--	2021-11-01 05:53
gameport.h	5.42 KB	-rw-r--r--	2021-11-01 05:53
gcd.h	193 B	-rw-r--r--	2021-11-01 05:53
genalloc.h	7.73 KB	-rw-r--r--	2026-06-21 00:49
generic-radix-tree.h	6.35 KB	-rw-r--r--	2021-11-01 05:53
genetlink.h	589 B	-rw-r--r--	2021-11-01 05:53
genhd.h	8.84 KB	-rw-r--r--	2026-06-21 00:49
genl_magic_func.h	11.53 KB	-rw-r--r--	2021-11-01 05:53
genl_magic_struct.h	7.61 KB	-rw-r--r--	2021-11-01 05:53
getcpu.h	641 B	-rw-r--r--	2021-11-01 05:53
gfp.h	26.26 KB	-rw-r--r--	2026-06-21 00:49
glob.h	256 B	-rw-r--r--	2021-11-01 05:53
gnss.h	1.56 KB	-rw-r--r--	2021-11-01 05:53
goldfish.h	878 B	-rw-r--r--	2026-06-21 00:49
gpio-pxa.h	571 B	-rw-r--r--	2021-11-01 05:53
gpio.h	5.3 KB	-rw-r--r--	2021-11-01 05:53
gpio_keys.h	1.74 KB	-rw-r--r--	2021-11-01 05:53
greybus.h	4.14 KB	-rw-r--r--	2021-11-01 05:53
hardirq.h	3.43 KB	-rw-r--r--	2021-11-01 05:53
hash.h	3 KB	-rw-r--r--	2021-11-01 05:53
hashtable.h	6.67 KB	-rw-r--r--	2021-11-01 05:53
hdlc.h	3.19 KB	-rw-r--r--	2021-11-01 05:53
hdlcdrv.h	6.32 KB	-rw-r--r--	2021-11-01 05:53
hdmi.h	12.41 KB	-rw-r--r--	2021-11-01 05:53
hid-debug.h	1.42 KB	-rw-r--r--	2021-11-01 05:53
hid-roccat.h	484 B	-rw-r--r--	2021-11-01 05:53
hid-sensor-hub.h	8.97 KB	-rw-r--r--	2021-11-01 05:53
hid-sensor-ids.h	7.44 KB	-rw-r--r--	2021-11-01 05:53
hid.h	38.01 KB	-rw-r--r--	2026-06-21 00:49
hidden.h	966 B	-rw-r--r--	2021-11-01 05:53
hiddev.h	1.42 KB	-rw-r--r--	2021-11-01 05:53
hidraw.h	1.12 KB	-rw-r--r--	2021-11-01 05:53
highmem-internal.h	5.12 KB	-rw-r--r--	2026-06-21 00:49
highmem.h	9.5 KB	-rw-r--r--	2026-06-21 00:49
highuid.h	3.12 KB	-rw-r--r--	2021-11-01 05:53
hil.h	18.42 KB	-rw-r--r--	2021-11-01 05:53
hil_mlc.h	5.13 KB	-rw-r--r--	2021-11-01 05:53
hippidevice.h	1.03 KB	-rw-r--r--	2021-11-01 05:53
hmm.h	4.07 KB	-rw-r--r--	2021-11-01 05:53
host1x.h	10.74 KB	-rw-r--r--	2021-11-01 05:53
hp_sdc.h	14.02 KB	-rw-r--r--	2021-11-01 05:53
hpet.h	2.55 KB	-rw-r--r--	2021-11-01 05:53
hrtimer.h	16.13 KB	-rw-r--r--	2026-06-21 00:49
hrtimer_defs.h	660 B	-rw-r--r--	2021-11-01 05:53
htcpld.h	617 B	-rw-r--r--	2021-11-01 05:53
huge_mm.h	13.27 KB	-rw-r--r--	2021-11-01 05:53
hugetlb.h	29.89 KB	-rw-r--r--	2026-06-21 00:49
hugetlb_cgroup.h	7.07 KB	-rw-r--r--	2021-11-01 05:53
hugetlb_inline.h	374 B	-rw-r--r--	2021-11-01 05:53
hw_breakpoint.h	4.15 KB	-rw-r--r--	2021-11-01 05:53
hw_random.h	2.12 KB	-rw-r--r--	2026-06-21 00:49
hwmon-sysfs.h	2.77 KB	-rw-r--r--	2021-11-01 05:53
hwmon-vid.h	862 B	-rw-r--r--	2021-11-01 05:53
hwmon.h	14.78 KB	-rw-r--r--	2021-11-01 05:53
hwspinlock.h	15.79 KB	-rw-r--r--	2026-06-21 00:49
hyperv.h	49.04 KB	-rw-r--r--	2026-06-21 00:49
hypervisor.h	608 B	-rw-r--r--	2021-11-01 05:53
i2c-algo-bit.h	1.4 KB	-rw-r--r--	2021-11-01 05:53
i2c-algo-pca.h	2.89 KB	-rw-r--r--	2021-11-01 05:53
i2c-algo-pcf.h	1.21 KB	-rw-r--r--	2021-11-01 05:53
i2c-dev.h	371 B	-rw-r--r--	2021-11-01 05:53
i2c-mux.h	1.63 KB	-rw-r--r--	2021-11-01 05:53
i2c-smbus.h	1.7 KB	-rw-r--r--	2026-06-21 00:49
i2c.h	38.6 KB	-rw-r--r--	2026-06-21 00:49
i8042.h	1.99 KB	-rw-r--r--	2021-11-01 05:53
i8253.h	808 B	-rw-r--r--	2026-06-21 00:49
icmp.h	1 KB	-rw-r--r--	2021-11-01 05:53
icmpv6.h	2.7 KB	-rw-r--r--	2021-11-01 05:53
idle_inject.h	932 B	-rw-r--r--	2021-11-01 05:53
idr.h	9.7 KB	-rw-r--r--	2026-06-21 00:49
ieee80211.h	124.15 KB	-rw-r--r--	2026-06-21 00:49
ieee802154.h	11.12 KB	-rw-r--r--	2021-11-01 05:53
if_arp.h	1.81 KB	-rw-r--r--	2026-06-21 00:49
if_bridge.h	4.8 KB	-rw-r--r--	2026-06-21 00:49
if_eql.h	1.07 KB	-rw-r--r--	2021-11-01 05:53
if_ether.h	1.26 KB	-rw-r--r--	2021-11-01 05:53
if_fddi.h	3.24 KB	-rw-r--r--	2021-11-01 05:53
if_hsr.h	586 B	-rw-r--r--	2021-11-01 05:53
if_link.h	592 B	-rw-r--r--	2021-11-01 05:53
if_ltalk.h	188 B	-rw-r--r--	2021-11-01 05:53
if_macvlan.h	2.69 KB	-rw-r--r--	2021-11-01 05:53
if_phonet.h	319 B	-rw-r--r--	2021-11-01 05:53
if_pppol2tp.h	516 B	-rw-r--r--	2021-11-01 05:53
if_pppox.h	2.84 KB	-rw-r--r--	2021-11-01 05:53
if_rmnet.h	2.04 KB	-rw-r--r--	2021-11-01 05:53
if_tap.h	2.21 KB	-rw-r--r--	2021-11-01 05:53
if_team.h	7.9 KB	-rw-r--r--	2026-06-21 00:49
if_tun.h	1.55 KB	-rw-r--r--	2021-11-01 05:53
if_tunnel.h	409 B	-rw-r--r--	2021-11-01 05:53
if_vlan.h	21.18 KB	-rw-r--r--	2026-06-21 00:49
igmp.h	4.31 KB	-rw-r--r--	2026-06-21 00:49
ihex.h	2.15 KB	-rw-r--r--	2021-11-01 05:53
ima.h	5.79 KB	-rw-r--r--	2026-06-21 00:49
imx-media.h	605 B	-rw-r--r--	2021-11-01 05:53
in.h	2.29 KB	-rw-r--r--	2021-11-01 05:53
in6.h	1.63 KB	-rw-r--r--	2021-11-01 05:53
indirect_call_wrapper.h	2.37 KB	-rw-r--r--	2026-06-21 00:49
inet.h	2.64 KB	-rw-r--r--	2021-11-01 05:53
inet_diag.h	2.74 KB	-rw-r--r--	2021-11-01 05:53
inetdevice.h	8.87 KB	-rw-r--r--	2021-11-01 05:53
init.h	11.39 KB	-rw-r--r--	2021-11-01 05:53
init_ohci1394_dma.h	196 B	-rw-r--r--	2021-11-01 05:53
init_syscalls.h	1.01 KB	-rw-r--r--	2021-11-01 05:53
init_task.h	1.3 KB	-rw-r--r--	2021-11-01 05:53
initrd.h	1.02 KB	-rw-r--r--	2021-11-01 05:53
inotify.h	713 B	-rw-r--r--	2021-11-01 05:53
input.h	19.88 KB	-rw-r--r--	2021-11-01 05:53
instrumentation.h	1.93 KB	-rw-r--r--	2026-06-21 00:49
instrumented.h	3.6 KB	-rw-r--r--	2021-11-01 05:53
integrity.h	1.15 KB	-rw-r--r--	2021-11-01 05:53
intel-iommu.h	27.28 KB	-rw-r--r--	2026-06-21 00:49
intel-ish-client-if.h	3.97 KB	-rw-r--r--	2021-11-01 05:53
intel-svm.h	1.54 KB	-rw-r--r--	2021-11-01 05:53
intel_rapl.h	4.14 KB	-rw-r--r--	2021-11-01 05:53
intel_th.h	2.44 KB	-rw-r--r--	2021-11-01 05:53
interconnect-provider.h	5.51 KB	-rw-r--r--	2021-11-01 05:53
interconnect.h	2.88 KB	-rw-r--r--	2021-11-01 05:53
interrupt.h	25.23 KB	-rw-r--r--	2026-06-21 00:49
interval_tree.h	831 B	-rw-r--r--	2021-11-01 05:53
interval_tree_generic.h	6.7 KB	-rw-r--r--	2021-11-01 05:53
io-64-nonatomic-hi-lo.h	2.41 KB	-rw-r--r--	2021-11-01 05:53
io-64-nonatomic-lo-hi.h	2.41 KB	-rw-r--r--	2021-11-01 05:53
io-mapping.h	4.65 KB	-rw-r--r--	2021-11-01 05:53
io-pgtable.h	8.65 KB	-rw-r--r--	2026-06-21 00:49
io.h	5.02 KB	-rw-r--r--	2021-11-01 05:53
io_uring.h	881 B	-rw-r--r--	2026-06-21 00:49
ioam6.h	226 B	-rw-r--r--	2021-11-01 05:53
ioam6_genl.h	266 B	-rw-r--r--	2021-11-01 05:53
ioam6_iptunnel.h	285 B	-rw-r--r--	2021-11-01 05:53
ioasid.h	2.07 KB	-rw-r--r--	2021-11-01 05:53
iocontext.h	4.59 KB	-rw-r--r--	2021-11-01 05:53
iomap.h	11.91 KB	-rw-r--r--	2026-06-21 00:49
iommu-helper.h	1.12 KB	-rw-r--r--	2021-11-01 05:53
iommu.h	34.06 KB	-rw-r--r--	2026-06-21 00:49
iopoll.h	7.61 KB	-rw-r--r--	2026-06-21 00:49
ioport.h	12.28 KB	-rw-r--r--	2026-06-21 00:49
ioprio.h	1.73 KB	-rw-r--r--	2026-06-21 00:49
iova.h	6.19 KB	-rw-r--r--	2026-06-21 00:49
ip.h	1 KB	-rw-r--r--	2021-11-01 05:53
ipack.h	8.69 KB	-rw-r--r--	2021-11-01 05:53
ipc.h	613 B	-rw-r--r--	2021-11-01 05:53
ipc_namespace.h	5.63 KB	-rw-r--r--	2026-06-21 00:49
ipmi.h	10.88 KB	-rw-r--r--	2021-11-01 05:53
ipmi_smi.h	7.98 KB	-rw-r--r--	2021-11-01 05:53
ipv6.h	8.7 KB	-rw-r--r--	2026-06-21 00:49
ipv6_route.h	372 B	-rw-r--r--	2021-11-01 05:53
irq.h	41.76 KB	-rw-r--r--	2026-06-21 00:49
irq_poll.h	575 B	-rw-r--r--	2021-11-01 05:53
irq_sim.h	789 B	-rw-r--r--	2021-11-01 05:53
irq_work.h	1.82 KB	-rw-r--r--	2026-06-21 00:49
irqbypass.h	3.45 KB	-rw-r--r--	2021-11-01 05:53
irqchip.h	2.33 KB	-rw-r--r--	2021-11-01 05:53
irqdesc.h	7.75 KB	-rw-r--r--	2021-11-01 05:53
irqdomain.h	20.24 KB	-rw-r--r--	2026-06-21 00:49
irqflags.h	7.91 KB	-rw-r--r--	2026-06-21 00:49
irqhandler.h	300 B	-rw-r--r--	2021-11-01 05:53
irqnr.h	856 B	-rw-r--r--	2021-11-01 05:53
irqreturn.h	503 B	-rw-r--r--	2021-11-01 05:53
isa.h	2.12 KB	-rw-r--r--	2021-11-01 05:53
isapnp.h	2.88 KB	-rw-r--r--	2021-11-01 05:53
iscsi_boot_sysfs.h	3.71 KB	-rw-r--r--	2021-11-01 05:53
iscsi_ibft.h	847 B	-rw-r--r--	2021-11-01 05:53
iversion.h	12.37 KB	-rw-r--r--	2021-11-01 05:53
jbd2.h	51.2 KB	-rw-r--r--	2026-06-21 00:49
jhash.h	4.56 KB	-rw-r--r--	2021-11-01 05:53
jiffies.h	15.07 KB	-rw-r--r--	2026-06-21 00:49
journal-head.h	2.91 KB	-rw-r--r--	2021-11-01 05:53
joystick.h	437 B	-rw-r--r--	2021-11-01 05:53
jump_label.h	16.05 KB	-rw-r--r--	2026-06-21 00:49
jump_label_ratelimit.h	2.77 KB	-rw-r--r--	2021-11-01 05:53
jz4740-adc.h	1023 B	-rw-r--r--	2021-11-01 05:53
jz4780-nemc.h	976 B	-rw-r--r--	2021-11-01 05:53
kallsyms.h	4.65 KB	-rw-r--r--	2026-06-21 00:49
kasan-checks.h	1.46 KB	-rw-r--r--	2021-11-01 05:53
kasan-tags.h	487 B	-rw-r--r--	2021-11-01 05:53
kasan.h	13.4 KB	-rw-r--r--	2026-06-21 00:49
kbd_diacr.h	198 B	-rw-r--r--	2021-11-01 05:53
kbd_kern.h	3.6 KB	-rw-r--r--	2021-11-01 05:53
kbuild.h	380 B	-rw-r--r--	2021-11-01 05:53
kconfig.h	2.63 KB	-rw-r--r--	2021-11-01 05:53
kcore.h	891 B	-rw-r--r--	2021-11-01 05:53
kcov.h	2.48 KB	-rw-r--r--	2026-06-21 00:49
kcsan-checks.h	15.86 KB	-rw-r--r--	2021-11-01 05:53
kcsan.h	1.88 KB	-rw-r--r--	2021-11-01 05:53
kdb.h	7.33 KB	-rw-r--r--	2021-11-01 05:53
kdebug.h	487 B	-rw-r--r--	2021-11-01 05:53
kdev_t.h	1.8 KB	-rw-r--r--	2021-11-01 05:53
kern_levels.h	1.57 KB	-rw-r--r--	2021-11-01 05:53
kernel-page-flags.h	528 B	-rw-r--r--	2021-11-01 05:53
kernel.h	17.01 KB	-rw-r--r--	2026-06-21 00:49
kernel_read_file.h	1.64 KB	-rw-r--r--	2021-11-01 05:53
kernel_stat.h	2.97 KB	-rw-r--r--	2026-06-21 00:49
kernelcapi.h	1.45 KB	-rw-r--r--	2021-11-01 05:53
kernfs.h	18.25 KB	-rw-r--r--	2026-06-21 00:49
kexec.h	12.44 KB	-rw-r--r--	2026-06-21 00:49
key-type.h	6.63 KB	-rw-r--r--	2026-06-21 00:49
key.h	15.75 KB	-rw-r--r--	2021-11-01 05:53
keyboard.h	665 B	-rw-r--r--	2021-11-01 05:53
keyctl.h	1.25 KB	-rw-r--r--	2021-11-01 05:53
keyslot-manager.h	3.78 KB	-rw-r--r--	2021-11-01 05:53
kfence.h	8.56 KB	-rw-r--r--	2026-06-21 00:49
kfifo.h	26.18 KB	-rw-r--r--	2026-06-21 00:49
kgdb.h	12.05 KB	-rw-r--r--	2021-11-01 05:53
khugepaged.h	2.74 KB	-rw-r--r--	2021-11-01 05:53
klist.h	1.88 KB	-rw-r--r--	2021-11-01 05:53
kmemleak.h	3.27 KB	-rw-r--r--	2021-11-01 05:53
kmod.h	1.02 KB	-rw-r--r--	2021-11-01 05:53
kmsg_dump.h	2.71 KB	-rw-r--r--	2021-11-01 05:53
kobj_map.h	545 B	-rw-r--r--	2021-11-01 05:53
kobject.h	7.7 KB	-rw-r--r--	2026-06-21 00:49
kobject_ns.h	1.9 KB	-rw-r--r--	2021-11-01 05:53
kprobes.h	14.72 KB	-rw-r--r--	2026-06-21 00:49
kref.h	3.08 KB	-rw-r--r--	2021-11-01 05:53
ks0108.h	970 B	-rw-r--r--	2021-11-01 05:53
ks8842.h	632 B	-rw-r--r--	2021-11-01 05:53
ks8851_mll.h	472 B	-rw-r--r--	2021-11-01 05:53
ksm.h	2.47 KB	-rw-r--r--	2021-11-01 05:53
kstrtox.h	6.59 KB	-rw-r--r--	2021-11-01 05:53
kthread.h	7.69 KB	-rw-r--r--	2026-06-21 00:49
ktime.h	5.38 KB	-rw-r--r--	2021-11-01 05:53
kvm_dirty_ring.h	2.73 KB	-rw-r--r--	2021-11-01 05:53
kvm_host.h	58.63 KB	-rw-r--r--	2026-06-21 00:49
kvm_irqfd.h	2 KB	-rw-r--r--	2021-11-01 05:53
kvm_para.h	402 B	-rw-r--r--	2021-11-01 05:53
kvm_types.h	2.17 KB	-rw-r--r--	2021-11-01 05:53
l2tp.h	261 B	-rw-r--r--	2021-11-01 05:53
lantiq.h	365 B	-rw-r--r--	2021-11-01 05:53
lapb.h	1.71 KB	-rw-r--r--	2021-11-01 05:53
latencytop.h	1.16 KB	-rw-r--r--	2021-11-01 05:53
lcd.h	3.78 KB	-rw-r--r--	2021-11-01 05:53
lcm.h	275 B	-rw-r--r--	2021-11-01 05:53
led-class-flash.h	6.74 KB	-rw-r--r--	2021-11-01 05:53
led-class-multicolor.h	3.26 KB	-rw-r--r--	2021-11-01 05:53
led-lm3530.h	3.7 KB	-rw-r--r--	2021-11-01 05:53
leds-bd2802.h	476 B	-rw-r--r--	2021-11-01 05:53
leds-lp3944.h	950 B	-rw-r--r--	2021-11-01 05:53
leds-lp3952.h	2.35 KB	-rw-r--r--	2021-11-01 05:53
leds-pca9532.h	866 B	-rw-r--r--	2021-11-01 05:53
leds-regulator.h	1.14 KB	-rw-r--r--	2021-11-01 05:53
leds-ti-lmu-common.h	1.12 KB	-rw-r--r--	2021-11-01 05:53
leds.h	18.06 KB	-rw-r--r--	2026-06-21 00:49
libata.h	67.43 KB	-rw-r--r--	2026-06-21 00:49
libfdt.h	202 B	-rw-r--r--	2021-11-01 05:53
libfdt_env.h	491 B	-rw-r--r--	2021-11-01 05:53
libgcc.h	463 B	-rw-r--r--	2021-11-01 05:53
libnvdimm.h	10.38 KB	-rw-r--r--	2021-11-01 05:53
libps2.h	1.89 KB	-rw-r--r--	2021-11-01 05:53
license.h	418 B	-rw-r--r--	2021-11-01 05:53
limits.h	715 B	-rw-r--r--	2021-11-01 05:53
linear_range.h	1.72 KB	-rw-r--r--	2021-11-01 05:53
linkage.h	9.6 KB	-rw-r--r--	2026-06-21 00:49
linkmode.h	2.5 KB	-rw-r--r--	2021-11-01 05:53
linux_logo.h	1.91 KB	-rw-r--r--	2021-11-01 05:53
lis3lv02d.h	5 KB	-rw-r--r--	2021-11-01 05:53
list.h	30.47 KB	-rw-r--r--	2026-06-21 00:49
list_bl.h	4.79 KB	-rw-r--r--	2021-11-01 05:53
list_lru.h	7.29 KB	-rw-r--r--	2021-11-01 05:53
list_nulls.h	4.22 KB	-rw-r--r--	2021-11-01 05:53
list_sort.h	374 B	-rw-r--r--	2021-11-01 05:53
litex.h	2.06 KB	-rw-r--r--	2021-11-01 05:53
livepatch.h	8.22 KB	-rw-r--r--	2021-11-01 05:53
llc.h	749 B	-rw-r--r--	2021-11-01 05:53
llist.h	9.06 KB	-rw-r--r--	2021-11-01 05:53
local_lock.h	1.33 KB	-rw-r--r--	2021-11-01 05:53
local_lock_internal.h	3.42 KB	-rw-r--r--	2021-11-01 05:53
lockdep.h	21.49 KB	-rw-r--r--	2026-06-21 00:49
lockdep_types.h	5.18 KB	-rw-r--r--	2021-11-01 05:53
lockref.h	1.5 KB	-rw-r--r--	2021-11-01 05:53
log2.h	6.22 KB	-rw-r--r--	2021-11-01 05:53
logic_iomem.h	2.07 KB	-rw-r--r--	2021-11-01 05:53
logic_pio.h	3.23 KB	-rw-r--r--	2021-11-01 05:53
lp.h	2.76 KB	-rw-r--r--	2021-11-01 05:53
lru_cache.h	11.83 KB	-rw-r--r--	2021-11-01 05:53
lsm_audit.h	2.81 KB	-rw-r--r--	2021-11-01 05:53
lsm_hook_defs.h	21.01 KB	-rw-r--r--	2026-06-21 00:49
lsm_hooks.h	74.39 KB	-rw-r--r--	2026-06-21 00:49
lz4.h	26.44 KB	-rw-r--r--	2021-11-01 05:53
lzo.h	1.93 KB	-rw-r--r--	2026-06-21 00:49
mISDNdsp.h	1.19 KB	-rw-r--r--	2021-11-01 05:53
mISDNhw.h	5.39 KB	-rw-r--r--	2021-11-01 05:53
mISDNif.h	14.89 KB	-rw-r--r--	2021-11-01 05:53
mailbox_client.h	1.71 KB	-rw-r--r--	2021-11-01 05:53
mailbox_controller.h	5.7 KB	-rw-r--r--	2026-06-21 00:49
maple.h	2.71 KB	-rw-r--r--	2021-11-01 05:53
marvell_phy.h	1.69 KB	-rw-r--r--	2021-11-01 05:53
math.h	5.06 KB	-rw-r--r--	2021-11-01 05:53
math64.h	7.48 KB	-rw-r--r--	2021-11-01 05:53
mbcache.h	2.16 KB	-rw-r--r--	2026-06-21 00:49
mbus.h	3.09 KB	-rw-r--r--	2021-11-01 05:53
mc146818rtc.h	4.69 KB	-rw-r--r--	2026-06-21 00:49
mc6821.h	1.18 KB	-rw-r--r--	2021-11-01 05:53
mcb.h	3.71 KB	-rw-r--r--	2026-06-21 00:49
mdev.h	5.94 KB	-rw-r--r--	2021-11-01 05:53
mdio-bitbang.h	1.31 KB	-rw-r--r--	2021-11-01 05:53
mdio-gpio.h	177 B	-rw-r--r--	2021-11-01 05:53
mdio-mux.h	1021 B	-rw-r--r--	2021-11-01 05:53
mdio.h	12.69 KB	-rw-r--r--	2026-06-21 00:49
mei_cl_bus.h	3.75 KB	-rw-r--r--	2021-11-01 05:53
mem_encrypt.h	885 B	-rw-r--r--	2021-11-01 05:53
memblock.h	19.88 KB	-rw-r--r--	2026-06-21 00:49
memcontrol.h	43.58 KB	-rw-r--r--	2026-06-21 00:49
memfd.h	719 B	-rw-r--r--	2026-06-21 00:49
memory.h	5.99 KB	-rw-r--r--	2021-11-01 05:53
memory_hotplug.h	11.42 KB	-rw-r--r--	2021-11-01 05:53
mempolicy.h	7.37 KB	-rw-r--r--	2021-11-01 05:53
mempool.h	3.35 KB	-rw-r--r--	2021-11-01 05:53
memregion.h	417 B	-rw-r--r--	2026-06-21 00:49
memremap.h	5.61 KB	-rw-r--r--	2026-06-21 00:49
memstick.h	9.6 KB	-rw-r--r--	2021-11-01 05:53
mhi.h	26.04 KB	-rw-r--r--	2026-06-21 00:49
micrel_phy.h	1.84 KB	-rw-r--r--	2026-06-21 00:49
microchipphy.h	2.65 KB	-rw-r--r--	2021-11-01 05:53
migrate.h	5.41 KB	-rw-r--r--	2021-11-01 05:53
migrate_mode.h	758 B	-rw-r--r--	2021-11-01 05:53
mii.h	16.33 KB	-rw-r--r--	2021-11-01 05:53
mii_timestamper.h	3.57 KB	-rw-r--r--	2021-11-01 05:53
min_heap.h	3.3 KB	-rw-r--r--	2021-11-01 05:53
minmax.h	10 KB	-rw-r--r--	2026-06-21 00:49
misc_cgroup.h	2.95 KB	-rw-r--r--	2021-11-01 05:53
miscdevice.h	3.2 KB	-rw-r--r--	2021-11-01 05:53
mm.h	105.69 KB	-rw-r--r--	2026-06-21 00:49
mm_inline.h	2.92 KB	-rw-r--r--	2021-11-01 05:53
mm_types.h	25.21 KB	-rw-r--r--	2026-06-21 00:49
mm_types_task.h	2.5 KB	-rw-r--r--	2021-11-01 05:53
mman.h	3.96 KB	-rw-r--r--	2026-06-21 00:49
mmap_lock.h	4.25 KB	-rw-r--r--	2021-11-01 05:53
mmdebug.h	2.25 KB	-rw-r--r--	2021-11-01 05:53
mmiotrace.h	3.05 KB	-rw-r--r--	2021-11-01 05:53
mmu_context.h	855 B	-rw-r--r--	2021-11-01 05:53
mmu_notifier.h	24.64 KB	-rw-r--r--	2021-11-01 05:53
mmzone.h	47.39 KB	-rw-r--r--	2026-06-21 00:49
mnt_idmapping.h	7.65 KB	-rw-r--r--	2026-06-21 00:49
mnt_namespace.h	697 B	-rw-r--r--	2026-06-21 00:49
mod_devicetable.h	23.5 KB	-rw-r--r--	2026-06-21 00:49
module.h	24.04 KB	-rw-r--r--	2026-06-21 00:49
module_signature.h	1.22 KB	-rw-r--r--	2021-11-01 05:53
moduleloader.h	3.42 KB	-rw-r--r--	2026-06-21 00:49
moduleparam.h	22.24 KB	-rw-r--r--	2026-06-21 00:49
most.h	12.2 KB	-rw-r--r--	2021-11-01 05:53
mount.h	3.93 KB	-rw-r--r--	2021-11-01 05:53
moxtet.h	2.36 KB	-rw-r--r--	2021-11-01 05:53
mpage.h	737 B	-rw-r--r--	2021-11-01 05:53
mpi.h	8.41 KB	-rw-r--r--	2021-11-01 05:53
mpls.h	394 B	-rw-r--r--	2021-11-01 05:53
mpls_iptunnel.h	178 B	-rw-r--r--	2021-11-01 05:53
mroute.h	1.96 KB	-rw-r--r--	2026-06-21 00:49
mroute6.h	2.41 KB	-rw-r--r--	2021-11-01 05:53
mroute_base.h	12.17 KB	-rw-r--r--	2021-11-01 05:53
msdos_fs.h	273 B	-rw-r--r--	2021-11-01 05:53
msdos_partition.h	1.62 KB	-rw-r--r--	2021-11-01 05:53
msg.h	395 B	-rw-r--r--	2021-11-01 05:53
msi.h	15.36 KB	-rw-r--r--	2026-06-21 00:49
mtio.h	1.29 KB	-rw-r--r--	2021-11-01 05:53
mutex.h	7.31 KB	-rw-r--r--	2026-06-21 00:49
mv643xx.h	51.05 KB	-rw-r--r--	2021-11-01 05:53
mv643xx_eth.h	1.95 KB	-rw-r--r--	2021-11-01 05:53
mv643xx_i2c.h	335 B	-rw-r--r--	2021-11-01 05:53
mvebu-pmsu.h	520 B	-rw-r--r--	2021-11-01 05:53
mxm-wmi.h	399 B	-rw-r--r--	2021-11-01 05:53
namei.h	4.57 KB	-rw-r--r--	2026-06-21 00:49
nd.h	5.55 KB	-rw-r--r--	2021-11-01 05:53
ndctl.h	674 B	-rw-r--r--	2021-11-01 05:53
net.h	11.47 KB	-rw-r--r--	2026-06-21 00:49
netdev_features.h	10.75 KB	-rw-r--r--	2026-06-21 00:49
netdevice.h	168.73 KB	-rw-r--r--	2026-06-21 00:49
netfilter.h	13.56 KB	-rw-r--r--	2026-06-21 00:49
netfilter_bridge.h	2.08 KB	-rw-r--r--	2021-11-01 05:53
netfilter_defs.h	242 B	-rw-r--r--	2026-06-21 00:49
netfilter_ingress.h	1.44 KB	-rw-r--r--	2021-11-01 05:53
netfilter_ipv4.h	1.05 KB	-rw-r--r--	2021-11-01 05:53
netfilter_ipv6.h	5.85 KB	-rw-r--r--	2021-11-01 05:53
netfs.h	7.93 KB	-rw-r--r--	2021-11-01 05:53
netlink.h	7.88 KB	-rw-r--r--	2021-11-01 05:53
netpoll.h	2.42 KB	-rw-r--r--	2026-06-21 00:49
nfs.h	1.47 KB	-rw-r--r--	2026-06-21 00:49
nfs3.h	260 B	-rw-r--r--	2021-11-01 05:53
nfs4.h	19.37 KB	-rw-r--r--	2026-06-21 00:49
nfs_common.h	402 B	-rw-r--r--	2026-06-21 00:49
nfs_fs.h	20.39 KB	-rw-r--r--	2026-06-21 00:49
nfs_fs_i.h	308 B	-rw-r--r--	2021-11-01 05:53
nfs_fs_sb.h	10.25 KB	-rw-r--r--	2026-06-21 00:49
nfs_iostat.h	4.18 KB	-rw-r--r--	2021-11-01 05:53
nfs_page.h	6.8 KB	-rw-r--r--	2026-06-21 00:49
nfs_ssc.h	2.01 KB	-rw-r--r--	2026-06-21 00:49
nfs_xdr.h	42.26 KB	-rw-r--r--	2026-06-21 00:49
nfsacl.h	1.4 KB	-rw-r--r--	2021-11-01 05:53
nitro_enclaves.h	267 B	-rw-r--r--	2021-11-01 05:53
nl802154.h	3.85 KB	-rw-r--r--	2021-11-01 05:53
nls.h	3.09 KB	-rw-r--r--	2026-06-21 00:49
nmi.h	6.76 KB	-rw-r--r--	2026-06-21 00:49
node.h	4.67 KB	-rw-r--r--	2021-11-01 05:53
nodemask.h	17.17 KB	-rw-r--r--	2026-06-21 00:49
nospec.h	2.24 KB	-rw-r--r--	2026-06-21 00:49
notifier.h	7.84 KB	-rw-r--r--	2021-11-01 05:53
ns_common.h	283 B	-rw-r--r--	2021-11-01 05:53
nsc_gpio.h	1.42 KB	-rw-r--r--	2021-11-01 05:53
nsproxy.h	3.09 KB	-rw-r--r--	2021-11-01 05:53
ntb.h	52.43 KB	-rw-r--r--	2021-11-01 05:53
ntb_transport.h	3.8 KB	-rw-r--r--	2021-11-01 05:53
nubus.h	5.54 KB	-rw-r--r--	2021-11-01 05:53
numa.h	1.25 KB	-rw-r--r--	2021-11-01 05:53
nvme-fc-driver.h	45.86 KB	-rw-r--r--	2021-11-01 05:53
nvme-fc.h	9.72 KB	-rw-r--r--	2021-11-01 05:53
nvme-rdma.h	2.04 KB	-rw-r--r--	2021-11-01 05:53
nvme-tcp.h	4.42 KB	-rw-r--r--	2026-06-21 00:49
nvme.h	38.32 KB	-rw-r--r--	2026-06-21 00:49
nvmem-consumer.h	6.78 KB	-rw-r--r--	2021-11-01 05:53
nvmem-provider.h	4.66 KB	-rw-r--r--	2026-06-21 00:49
nvram.h	3.47 KB	-rw-r--r--	2021-11-01 05:53
objagg.h	1.94 KB	-rw-r--r--	2026-06-21 00:49
objtool.h	5.24 KB	-rw-r--r--	2026-06-21 00:49
of.h	43.5 KB	-rw-r--r--	2026-06-21 00:49
of_address.h	4.17 KB	-rw-r--r--	2021-11-01 05:53
of_clk.h	819 B	-rw-r--r--	2021-11-01 05:53
of_device.h	2.96 KB	-rw-r--r--	2026-06-21 00:49
of_dma.h	2.3 KB	-rw-r--r--	2021-11-01 05:53
of_fdt.h	3.65 KB	-rw-r--r--	2026-06-21 00:49
of_gpio.h	4.07 KB	-rw-r--r--	2021-11-01 05:53
of_graph.h	3.55 KB	-rw-r--r--	2021-11-01 05:53
of_iommu.h	505 B	-rw-r--r--	2021-11-01 05:53
of_irq.h	3.75 KB	-rw-r--r--	2021-11-01 05:53
of_mdio.h	3.91 KB	-rw-r--r--	2026-06-21 00:49
of_net.h	1009 B	-rw-r--r--	2026-06-21 00:49
of_pci.h	915 B	-rw-r--r--	2021-11-01 05:53
of_pdt.h	1.14 KB	-rw-r--r--	2021-11-01 05:53
of_platform.h	3.88 KB	-rw-r--r--	2021-11-01 05:53
of_reserved_mem.h	2.24 KB	-rw-r--r--	2021-11-01 05:53
oid_registry.h	5.63 KB	-rw-r--r--	2021-11-01 05:53
olpc-ec.h	1.95 KB	-rw-r--r--	2021-11-01 05:53
omap-dma.h	9.79 KB	-rw-r--r--	2021-11-01 05:53
omap-gpmc.h	2.64 KB	-rw-r--r--	2021-11-01 05:53
omap-iommu.h	880 B	-rw-r--r--	2021-11-01 05:53
omap-mailbox.h	689 B	-rw-r--r--	2021-11-01 05:53
omapfb.h	576 B	-rw-r--r--	2021-11-01 05:53
once.h	2.8 KB	-rw-r--r--	2026-06-21 00:49
once_lite.h	925 B	-rw-r--r--	2026-06-21 00:49
oom.h	3.26 KB	-rw-r--r--	2021-11-01 05:53
openvswitch.h	403 B	-rw-r--r--	2021-11-01 05:53
osq_lock.h	1.04 KB	-rw-r--r--	2021-11-01 05:53
overflow.h	7.82 KB	-rw-r--r--	2026-06-21 00:49
packing.h	1.76 KB	-rw-r--r--	2021-11-01 05:53
padata.h	5.96 KB	-rw-r--r--	2026-06-21 00:49
page-flags-layout.h	3.21 KB	-rw-r--r--	2021-11-01 05:53
page-flags.h	28 KB	-rw-r--r--	2021-11-01 05:53
page-isolation.h	1.64 KB	-rw-r--r--	2021-11-01 05:53
page_counter.h	2.3 KB	-rw-r--r--	2021-11-01 05:53
page_ext.h	1.83 KB	-rw-r--r--	2021-11-01 05:53
page_idle.h	2.61 KB	-rw-r--r--	2021-11-01 05:53
page_owner.h	2.31 KB	-rw-r--r--	2021-11-01 05:53
page_ref.h	4.95 KB	-rw-r--r--	2021-11-01 05:53
page_reporting.h	895 B	-rw-r--r--	2021-11-01 05:53
pageblock-flags.h	2.31 KB	-rw-r--r--	2021-11-01 05:53
pagemap.h	30.5 KB	-rw-r--r--	2026-06-21 00:49
pagevec.h	2.04 KB	-rw-r--r--	2021-11-01 05:53
pagewalk.h	4.22 KB	-rw-r--r--	2026-06-21 00:49
panic.h	2.59 KB	-rw-r--r--	2026-06-21 00:49
panic_notifier.h	296 B	-rw-r--r--	2021-11-01 05:53
parman.h	2.87 KB	-rw-r--r--	2021-11-01 05:53
parport.h	19.09 KB	-rw-r--r--	2021-11-01 05:53
parport_pc.h	6.56 KB	-rw-r--r--	2021-11-01 05:53
parser.h	1.17 KB	-rw-r--r--	2021-11-01 05:53
part_stat.h	2.38 KB	-rw-r--r--	2026-06-21 00:49
pata_arasan_cf_data.h	1.22 KB	-rw-r--r--	2021-11-01 05:53
patchkey.h	757 B	-rw-r--r--	2021-11-01 05:53
path.h	572 B	-rw-r--r--	2021-11-01 05:53
pch_dma.h	408 B	-rw-r--r--	2021-11-01 05:53
pci-acpi.h	3.85 KB	-rw-r--r--	2021-11-01 05:53
pci-ats.h	1.76 KB	-rw-r--r--	2021-11-01 05:53
pci-dma-compat.h	3.66 KB	-rw-r--r--	2021-11-01 05:53
pci-ecam.h	3.2 KB	-rw-r--r--	2021-11-01 05:53
pci-ep-cfs.h	956 B	-rw-r--r--	2021-11-01 05:53
pci-epc.h	9.47 KB	-rw-r--r--	2021-11-01 05:53
pci-epf.h	7.06 KB	-rw-r--r--	2021-11-01 05:53
pci-p2pdma.h	3.95 KB	-rw-r--r--	2021-11-01 05:53
pci.h	90.67 KB	-rw-r--r--	2026-06-21 00:49
pci_hotplug.h	4.35 KB	-rw-r--r--	2021-11-01 05:53
pci_ids.h	121.23 KB	-rw-r--r--	2026-06-21 00:49
pcs-lynx.h	425 B	-rw-r--r--	2021-11-01 05:53
pda_power.h	1005 B	-rw-r--r--	2021-11-01 05:53
pe.h	16.17 KB	-rw-r--r--	2021-11-01 05:53
percpu-defs.h	18.12 KB	-rw-r--r--	2021-11-01 05:53
percpu-refcount.h	10.84 KB	-rw-r--r--	2021-11-01 05:53
percpu-rwsem.h	4.16 KB	-rw-r--r--	2021-11-01 05:53
percpu.h	4.74 KB	-rw-r--r--	2026-06-21 00:49
percpu_counter.h	5.48 KB	-rw-r--r--	2026-06-21 00:49
perf_event.h	47.23 KB	-rw-r--r--	2026-06-21 00:49
perf_regs.h	1.05 KB	-rw-r--r--	2021-11-01 05:53
personality.h	393 B	-rw-r--r--	2021-11-01 05:53
pfn.h	666 B	-rw-r--r--	2021-11-01 05:53
pfn_t.h	3.21 KB	-rw-r--r--	2021-11-01 05:53
pgalloc.h	948 B	-rw-r--r--	2026-06-21 00:49
pgtable.h	44.43 KB	-rw-r--r--	2026-06-21 00:49
phonet.h	537 B	-rw-r--r--	2021-11-01 05:53
phy.h	58.08 KB	-rw-r--r--	2026-06-21 00:49
phy_fixed.h	1.77 KB	-rw-r--r--	2021-11-01 05:53
phy_led_triggers.h	1.01 KB	-rw-r--r--	2021-11-01 05:53
phylink.h	19.47 KB	-rw-r--r--	2026-06-21 00:49
pid.h	6.37 KB	-rw-r--r--	2026-06-21 00:49
pid_namespace.h	2.08 KB	-rw-r--r--	2021-11-01 05:53
pim.h	2.67 KB	-rw-r--r--	2021-11-01 05:53
pipe_fs_i.h	9.21 KB	-rw-r--r--	2026-06-21 00:49
pkeys.h	990 B	-rw-r--r--	2021-11-01 05:53
pktcdvd.h	5.87 KB	-rw-r--r--	2021-11-01 05:53
pl320-ipc.h	209 B	-rw-r--r--	2021-11-01 05:53
platform_device.h	12.77 KB	-rw-r--r--	2026-06-21 00:49
platform_profile.h	1.12 KB	-rw-r--r--	2021-11-01 05:53
pldmfw.h	4.76 KB	-rw-r--r--	2021-11-01 05:53
plist.h	8.66 KB	-rw-r--r--	2021-11-01 05:53
pm-trace.h	940 B	-rw-r--r--	2021-11-01 05:53
pm.h	34.87 KB	-rw-r--r--	2026-06-21 00:49
pm_clock.h	2.58 KB	-rw-r--r--	2021-11-01 05:53
pm_domain.h	13.18 KB	-rw-r--r--	2021-11-01 05:53
pm_opp.h	15.1 KB	-rw-r--r--	2021-11-01 05:53
pm_qos.h	10.41 KB	-rw-r--r--	2021-11-01 05:53
pm_runtime.h	19.69 KB	-rw-r--r--	2026-06-21 00:49
pm_wakeirq.h	1.48 KB	-rw-r--r--	2026-06-21 00:49
pm_wakeup.h	6.28 KB	-rw-r--r--	2021-11-01 05:53
pmbus.h	2.48 KB	-rw-r--r--	2021-11-01 05:53
pmu.h	2.44 KB	-rw-r--r--	2021-11-01 05:53
pnfs_osd_xdr.h	9.27 KB	-rw-r--r--	2021-11-01 05:53
pnp.h	14.9 KB	-rw-r--r--	2021-11-01 05:53
poison.h	2.48 KB	-rw-r--r--	2021-11-01 05:53
poll.h	4.27 KB	-rw-r--r--	2026-06-21 00:49
posix-clock.h	4.7 KB	-rw-r--r--	2026-06-21 00:49
posix-timers.h	7.21 KB	-rw-r--r--	2026-06-21 00:49
posix_acl.h	3.27 KB	-rw-r--r--	2021-11-01 05:53
posix_acl_xattr.h	1.86 KB	-rw-r--r--	2026-06-21 00:49
power_supply.h	17.8 KB	-rw-r--r--	2026-06-21 00:49
powercap.h	11.98 KB	-rw-r--r--	2021-11-01 05:53
ppp-comp.h	2.95 KB	-rw-r--r--	2021-11-01 05:53
ppp_channel.h	2.99 KB	-rw-r--r--	2021-11-01 05:53
ppp_defs.h	1.12 KB	-rw-r--r--	2026-06-21 00:49
pps_kernel.h	2.94 KB	-rw-r--r--	2026-06-21 00:49
pr.h	566 B	-rw-r--r--	2021-11-01 05:53
prandom.h	3.38 KB	-rw-r--r--	2026-06-21 00:49
preempt.h	14.7 KB	-rw-r--r--	2026-06-21 00:49
prefetch.h	1.7 KB	-rw-r--r--	2021-11-01 05:53
prime_numbers.h	1.35 KB	-rw-r--r--	2021-11-01 05:53
printk.h	22.23 KB	-rw-r--r--	2026-06-21 00:49
prmt.h	143 B	-rw-r--r--	2021-11-01 05:53
proc_fs.h	8.6 KB	-rw-r--r--	2026-06-21 00:49
proc_ns.h	2.57 KB	-rw-r--r--	2021-11-01 05:53
processor.h	1.84 KB	-rw-r--r--	2021-11-01 05:53
profile.h	2.62 KB	-rw-r--r--	2026-06-21 00:49
projid.h	2.22 KB	-rw-r--r--	2021-11-01 05:53
property.h	17.65 KB	-rw-r--r--	2026-06-21 00:49
pruss_driver.h	1.27 KB	-rw-r--r--	2021-11-01 05:53
psci.h	1.52 KB	-rw-r--r--	2021-11-01 05:53
pseudo_fs.h	355 B	-rw-r--r--	2021-11-01 05:53
psi.h	1.56 KB	-rw-r--r--	2026-06-21 00:49
psi_types.h	4.31 KB	-rw-r--r--	2026-06-21 00:49
psp-sev.h	17.76 KB	-rw-r--r--	2021-11-01 05:53
psp-tee.h	2.65 KB	-rw-r--r--	2021-11-01 05:53
pstore.h	7.63 KB	-rw-r--r--	2026-06-21 00:49
pstore_blk.h	1.53 KB	-rw-r--r--	2021-11-01 05:53
pstore_ram.h	3.82 KB	-rw-r--r--	2021-11-01 05:53
pstore_zone.h	2.28 KB	-rw-r--r--	2021-11-01 05:53
ptdump.h	567 B	-rw-r--r--	2021-11-01 05:53
pti.h	240 B	-rw-r--r--	2021-11-01 05:53
ptp_classify.h	4.85 KB	-rw-r--r--	2026-06-21 00:49
ptp_clock_kernel.h	12.2 KB	-rw-r--r--	2026-06-21 00:49
ptp_kvm.h	460 B	-rw-r--r--	2026-06-21 00:49
ptp_pch.h	623 B	-rw-r--r--	2021-11-01 05:53
ptr_ring.h	16.29 KB	-rw-r--r--	2021-11-01 05:53
ptrace.h	14.65 KB	-rw-r--r--	2026-06-21 00:49
purgatory.h	590 B	-rw-r--r--	2021-11-01 05:53
pvclock_gtod.h	548 B	-rw-r--r--	2021-11-01 05:53
pwm.h	16.46 KB	-rw-r--r--	2026-06-21 00:49
pwm_backlight.h	722 B	-rw-r--r--	2021-11-01 05:53
pxa168_eth.h	728 B	-rw-r--r--	2021-11-01 05:53
pxa2xx_ssp.h	11.13 KB	-rw-r--r--	2021-11-01 05:53
qcom-geni-se.h	13.74 KB	-rw-r--r--	2021-11-01 05:53
qcom_scm.h	3.81 KB	-rw-r--r--	2021-11-01 05:53
qnx6_fs.h	3.27 KB	-rw-r--r--	2021-11-01 05:53
quota.h	18.77 KB	-rw-r--r--	2026-06-21 00:49
quotaops.h	10.05 KB	-rw-r--r--	2026-06-21 00:49
radix-tree.h	15.63 KB	-rw-r--r--	2026-06-21 00:49
raid_class.h	2 KB	-rw-r--r--	2026-06-21 00:49
ramfs.h	746 B	-rw-r--r--	2026-06-21 00:49
random.h	3.98 KB	-rw-r--r--	2026-06-21 00:49
randomize_kstack.h	2.46 KB	-rw-r--r--	2026-06-21 00:49
range.h	775 B	-rw-r--r--	2021-11-01 05:53
ras.h	1.02 KB	-rw-r--r--	2021-11-01 05:53
ratelimit.h	1.72 KB	-rw-r--r--	2021-11-01 05:53
ratelimit_types.h	1.33 KB	-rw-r--r--	2026-06-21 00:49
rational.h	639 B	-rw-r--r--	2021-11-01 05:53
rbtree.h	8.93 KB	-rw-r--r--	2021-11-01 05:53
rbtree_augmented.h	9.53 KB	-rw-r--r--	2021-11-01 05:53
rbtree_latch.h	6.66 KB	-rw-r--r--	2026-06-21 00:49
rbtree_types.h	946 B	-rw-r--r--	2021-11-01 05:53
rcu_node_tree.h	3.73 KB	-rw-r--r--	2021-11-01 05:53
rcu_segcblist.h	10.03 KB	-rw-r--r--	2021-11-01 05:53
rcu_sync.h	1.46 KB	-rw-r--r--	2021-11-01 05:53
rculist.h	28.56 KB	-rw-r--r--	2021-11-01 05:53
rculist_bl.h	3.29 KB	-rw-r--r--	2021-11-01 05:53
rculist_nulls.h	8.68 KB	-rw-r--r--	2026-06-21 00:49
rcupdate.h	38.69 KB	-rw-r--r--	2026-06-21 00:49
rcupdate_trace.h	3.08 KB	-rw-r--r--	2021-11-01 05:53
rcupdate_wait.h	1.73 KB	-rw-r--r--	2021-11-01 05:53
rcutiny.h	3.32 KB	-rw-r--r--	2021-11-01 05:53
rcutree.h	2.34 KB	-rw-r--r--	2026-06-21 00:49
rcuwait.h	1.84 KB	-rw-r--r--	2021-11-01 05:53
reboot-mode.h	600 B	-rw-r--r--	2021-11-01 05:53
reboot.h	2.18 KB	-rw-r--r--	2021-11-01 05:53
reciprocal_div.h	3.28 KB	-rw-r--r--	2021-11-01 05:53
refcount.h	12.02 KB	-rw-r--r--	2021-11-01 05:53
regmap.h	63.97 KB	-rw-r--r--	2026-06-21 00:49
regset.h	11.35 KB	-rw-r--r--	2021-11-01 05:53
relay.h	8.47 KB	-rw-r--r--	2021-11-01 05:53
remoteproc.h	24.77 KB	-rw-r--r--	2021-11-01 05:53
resctrl.h	6.5 KB	-rw-r--r--	2021-11-01 05:53
reset-controller.h	3.57 KB	-rw-r--r--	2021-11-01 05:53
reset.h	30.24 KB	-rw-r--r--	2026-06-21 00:49
resource.h	339 B	-rw-r--r--	2021-11-01 05:53
resource_ext.h	2.08 KB	-rw-r--r--	2021-11-01 05:53
restart_block.h	1.11 KB	-rw-r--r--	2021-11-01 05:53
rfkill.h	10.52 KB	-rw-r--r--	2021-11-01 05:53
rhashtable-types.h	3.45 KB	-rw-r--r--	2021-11-01 05:53
rhashtable.h	37.59 KB	-rw-r--r--	2021-11-01 05:53
ring_buffer.h	7.56 KB	-rw-r--r--	2026-06-21 00:49
rio.h	19.02 KB	-rw-r--r--	2021-11-01 05:53
rio_drv.h	14.32 KB	-rw-r--r--	2021-11-01 05:53
rio_ids.h	1.08 KB	-rw-r--r--	2021-11-01 05:53
rio_regs.h	19.07 KB	-rw-r--r--	2021-11-01 05:53
rmap.h	9.13 KB	-rw-r--r--	2026-06-21 00:49
rmi.h	12.04 KB	-rw-r--r--	2021-11-01 05:53
rndis.h	16.86 KB	-rw-r--r--	2021-11-01 05:53
rodata_test.h	394 B	-rw-r--r--	2021-11-01 05:53
root_dev.h	619 B	-rw-r--r--	2021-11-01 05:53
rpmsg.h	8.77 KB	-rw-r--r--	2026-06-21 00:49
rslib.h	3.67 KB	-rw-r--r--	2021-11-01 05:53
rtc.h	8.65 KB	-rw-r--r--	2021-11-01 05:53
rtmutex.h	2.97 KB	-rw-r--r--	2021-11-01 05:53
rtnetlink.h	4.46 KB	-rw-r--r--	2021-11-01 05:53
rtsx_common.h	890 B	-rw-r--r--	2021-11-01 05:53
rtsx_pci.h	39.82 KB	-rw-r--r--	2026-06-21 00:49
rtsx_usb.h	15.38 KB	-rw-r--r--	2026-06-21 00:49
rwbase_rt.h	876 B	-rw-r--r--	2021-11-01 05:53
rwlock.h	4.55 KB	-rw-r--r--	2021-11-01 05:53
rwlock_api_smp.h	7.65 KB	-rw-r--r--	2021-11-01 05:53
rwlock_rt.h	2.98 KB	-rw-r--r--	2021-11-01 05:53
rwlock_types.h	1.77 KB	-rw-r--r--	2021-11-01 05:53
rwsem.h	7.63 KB	-rw-r--r--	2026-06-21 00:49
s3c_adc_battery.h	923 B	-rw-r--r--	2021-11-01 05:53
sbitmap.h	16.9 KB	-rw-r--r--	2021-11-01 05:53
scatterlist.h	17.56 KB	-rw-r--r--	2021-11-01 05:53
scc.h	2.84 KB	-rw-r--r--	2021-11-01 05:53
sched.h	64.73 KB	-rw-r--r--	2026-06-21 00:49
sched_clock.h	1.44 KB	-rw-r--r--	2021-11-01 05:53
scmi_protocol.h	26.06 KB	-rw-r--r--	2026-06-21 00:49
scpi_protocol.h	2.67 KB	-rw-r--r--	2021-11-01 05:53
screen_info.h	191 B	-rw-r--r--	2021-11-01 05:53
scs.h	1.83 KB	-rw-r--r--	2021-11-01 05:53
sctp.h	22.88 KB	-rw-r--r--	2021-11-01 05:53
scx200.h	1.82 KB	-rw-r--r--	2021-11-01 05:53
scx200_gpio.h	2.38 KB	-rw-r--r--	2021-11-01 05:53
sdb.h	4.17 KB	-rw-r--r--	2021-11-01 05:53
seccomp.h	3.45 KB	-rw-r--r--	2026-06-21 00:49
secretmem.h	1.14 KB	-rw-r--r--	2026-06-21 00:49
securebits.h	239 B	-rw-r--r--	2021-11-01 05:53
security.h	58.95 KB	-rw-r--r--	2026-06-21 00:49
sed-opal.h	1.66 KB	-rw-r--r--	2021-11-01 05:53
seg6.h	121 B	-rw-r--r--	2021-11-01 05:53
seg6_genl.h	136 B	-rw-r--r--	2021-11-01 05:53
seg6_hmac.h	136 B	-rw-r--r--	2021-11-01 05:53
seg6_iptunnel.h	148 B	-rw-r--r--	2021-11-01 05:53
seg6_local.h	100 B	-rw-r--r--	2021-11-01 05:53
selection.h	1.81 KB	-rw-r--r--	2021-11-01 05:53
sem.h	599 B	-rw-r--r--	2021-11-01 05:53
semaphore.h	1.35 KB	-rw-r--r--	2021-11-01 05:53
seq_buf.h	3.94 KB	-rw-r--r--	2021-11-01 05:53
seq_file.h	9 KB	-rw-r--r--	2026-06-21 00:49
seq_file_net.h	730 B	-rw-r--r--	2021-11-01 05:53
seqlock.h	39.51 KB	-rw-r--r--	2026-06-21 00:49
seqno-fence.h	3.57 KB	-rw-r--r--	2021-11-01 05:53
serdev.h	9.82 KB	-rw-r--r--	2021-11-01 05:53
serial.h	630 B	-rw-r--r--	2021-11-01 05:53
serial_8250.h	6.57 KB	-rw-r--r--	2026-06-21 00:49
serial_bcm63xx.h	4.73 KB	-rw-r--r--	2021-11-01 05:53
serial_core.h	20.46 KB	-rw-r--r--	2026-06-21 00:49
serial_max3100.h	1.19 KB	-rw-r--r--	2021-11-01 05:53
serial_s3c.h	9.42 KB	-rw-r--r--	2021-11-01 05:53
serial_sci.h	1.6 KB	-rw-r--r--	2021-11-01 05:53
serio.h	4.28 KB	-rw-r--r--	2021-11-01 05:53
set_memory.h	1.66 KB	-rw-r--r--	2021-11-01 05:53
sfp.h	15.87 KB	-rw-r--r--	2021-11-01 05:53
sh_clk.h	5.96 KB	-rw-r--r--	2021-11-01 05:53
sh_dma.h	3.47 KB	-rw-r--r--	2021-11-01 05:53
sh_eth.h	369 B	-rw-r--r--	2021-11-01 05:53
sh_intc.h	3.59 KB	-rw-r--r--	2026-06-21 00:49
sh_timer.h	172 B	-rw-r--r--	2021-11-01 05:53
shdma-base.h	4.27 KB	-rw-r--r--	2026-06-21 00:49
shm.h	968 B	-rw-r--r--	2021-11-01 05:53
shmem_fs.h	5.81 KB	-rw-r--r--	2021-11-01 05:53
shrinker.h	3.25 KB	-rw-r--r--	2021-11-01 05:53
signal.h	13.75 KB	-rw-r--r--	2026-06-21 00:49
signal_types.h	1.68 KB	-rw-r--r--	2026-06-21 00:49
signalfd.h	817 B	-rw-r--r--	2021-11-01 05:53
siox.h	2.26 KB	-rw-r--r--	2021-11-01 05:53
siphash.h	5.59 KB	-rw-r--r--	2026-06-21 00:49
sizes.h	1.27 KB	-rw-r--r--	2021-11-01 05:53
skb_array.h	5.18 KB	-rw-r--r--	2021-11-01 05:53
skbuff.h	138.19 KB	-rw-r--r--	2026-06-21 00:49
skmsg.h	13.44 KB	-rw-r--r--	2026-06-21 00:49
slab.h	23.74 KB	-rw-r--r--	2026-06-21 00:49
slab_def.h	3.02 KB	-rw-r--r--	2021-11-01 05:53
slimbus.h	6.93 KB	-rw-r--r--	2021-11-01 05:53
slub_def.h	6.22 KB	-rw-r--r--	2021-11-01 05:53
sm501-regs.h	11.62 KB	-rw-r--r--	2021-11-01 05:53
sm501.h	4.02 KB	-rw-r--r--	2021-11-01 05:53
smc911x.h	294 B	-rw-r--r--	2021-11-01 05:53
smc91x.h	1.57 KB	-rw-r--r--	2021-11-01 05:53
smp.h	7.63 KB	-rw-r--r--	2021-11-01 05:53
smp_types.h	1.35 KB	-rw-r--r--	2021-11-01 05:53
smpboot.h	1.68 KB	-rw-r--r--	2021-11-01 05:53
smsc911x.h	1.63 KB	-rw-r--r--	2021-11-01 05:53
smscphy.h	1.25 KB	-rw-r--r--	2021-11-01 05:53
sock_diag.h	2.31 KB	-rw-r--r--	2021-11-01 05:53
socket.h	15.1 KB	-rw-r--r--	2026-06-21 00:49
sockptr.h	2.36 KB	-rw-r--r--	2026-06-21 00:49
sonet.h	469 B	-rw-r--r--	2021-11-01 05:53
sony-laptop.h	1.41 KB	-rw-r--r--	2021-11-01 05:53
sonypi.h	1.71 KB	-rw-r--r--	2021-11-01 05:53
sort.h	346 B	-rw-r--r--	2021-11-01 05:53
sound.h	685 B	-rw-r--r--	2021-11-01 05:53
soundcard.h	1.59 KB	-rw-r--r--	2021-11-01 05:53
spinlock.h	15.08 KB	-rw-r--r--	2026-06-21 00:49
spinlock_api_smp.h	5.47 KB	-rw-r--r--	2021-11-01 05:53
spinlock_api_up.h	3.31 KB	-rw-r--r--	2021-11-01 05:53
spinlock_rt.h	4.11 KB	-rw-r--r--	2021-11-01 05:53
spinlock_types.h	1.78 KB	-rw-r--r--	2021-11-01 05:53
spinlock_types_raw.h	1.69 KB	-rw-r--r--	2021-11-01 05:53
spinlock_types_up.h	726 B	-rw-r--r--	2021-11-01 05:53
spinlock_up.h	2.16 KB	-rw-r--r--	2026-06-21 00:49
splice.h	3.31 KB	-rw-r--r--	2026-06-21 00:49
spmi.h	5.59 KB	-rw-r--r--	2021-11-01 05:53
sram.h	844 B	-rw-r--r--	2021-11-01 05:53
srcu.h	7.07 KB	-rw-r--r--	2026-06-21 00:49
srcutiny.h	2.75 KB	-rw-r--r--	2021-11-01 05:53
srcutree.h	4.8 KB	-rw-r--r--	2021-11-01 05:53
ssbi.h	726 B	-rw-r--r--	2021-11-01 05:53
stackdepot.h	686 B	-rw-r--r--	2026-06-21 00:49
stackleak.h	902 B	-rw-r--r--	2021-11-01 05:53
stackprotector.h	361 B	-rw-r--r--	2021-11-01 05:53
stacktrace.h	3.97 KB	-rw-r--r--	2026-06-21 00:49
start_kernel.h	415 B	-rw-r--r--	2021-11-01 05:53
stat.h	1.33 KB	-rw-r--r--	2021-11-01 05:53
statfs.h	1.78 KB	-rw-r--r--	2021-11-01 05:53
static_call.h	10.25 KB	-rw-r--r--	2026-06-21 00:49
static_call_types.h	2.74 KB	-rw-r--r--	2021-11-01 05:53
static_key.h	30 B	-rw-r--r--	2021-11-01 05:53
stdarg.h	313 B	-rw-r--r--	2021-11-01 05:53
stddef.h	3.2 KB	-rw-r--r--	2026-06-21 00:49
stm.h	4.34 KB	-rw-r--r--	2021-11-01 05:53
stmmac.h	6.86 KB	-rw-r--r--	2026-06-21 00:49
stmp3xxx_rtc_wdt.h	331 B	-rw-r--r--	2021-11-01 05:53
stmp_device.h	412 B	-rw-r--r--	2021-11-01 05:53
stop_machine.h	4.41 KB	-rw-r--r--	2021-11-01 05:53
string.h	10.01 KB	-rw-r--r--	2026-06-21 00:49
string_helpers.h	2.69 KB	-rw-r--r--	2021-11-01 05:53
stringhash.h	2.65 KB	-rw-r--r--	2021-11-01 05:53
stringify.h	341 B	-rw-r--r--	2021-11-01 05:53
sungem_phy.h	3.94 KB	-rw-r--r--	2021-11-01 05:53
sunserialcore.h	1.08 KB	-rw-r--r--	2021-11-01 05:53
sunxi-rsb.h	2.89 KB	-rw-r--r--	2021-11-01 05:53
superhyway.h	2.81 KB	-rw-r--r--	2021-11-01 05:53
surface_acpi_notify.h	1.07 KB	-rw-r--r--	2021-11-01 05:53
suspend.h	20.02 KB	-rw-r--r--	2026-06-21 00:49
svga.h	3.75 KB	-rw-r--r--	2021-11-01 05:53
sw842.h	328 B	-rw-r--r--	2021-11-01 05:53
swab.h	569 B	-rw-r--r--	2021-11-01 05:53
swait.h	9.45 KB	-rw-r--r--	2021-11-01 05:53
swap.h	23.43 KB	-rw-r--r--	2026-06-21 00:49
swap_cgroup.h	971 B	-rw-r--r--	2021-11-01 05:53
swap_slots.h	841 B	-rw-r--r--	2021-11-01 05:53
swapfile.h	556 B	-rw-r--r--	2021-11-01 05:53
swapops.h	9.85 KB	-rw-r--r--	2026-06-21 00:49
swiotlb.h	5.36 KB	-rw-r--r--	2026-06-21 00:49
switchtec.h	10.9 KB	-rw-r--r--	2021-11-01 05:53
sxgbe_platform.h	1.23 KB	-rw-r--r--	2021-11-01 05:53
sync_core.h	581 B	-rw-r--r--	2021-11-01 05:53
sync_file.h	1.57 KB	-rw-r--r--	2021-11-01 05:53
synclink.h	989 B	-rw-r--r--	2021-11-01 05:53
sys.h	960 B	-rw-r--r--	2021-11-01 05:53
sys_soc.h	1.26 KB	-rw-r--r--	2021-11-01 05:53
syscall_user_dispatch.h	930 B	-rw-r--r--	2021-11-01 05:53
syscalls.h	55.56 KB	-rw-r--r--	2026-06-21 00:49
syscore_ops.h	633 B	-rw-r--r--	2021-11-01 05:53
sysctl.h	8.59 KB	-rw-r--r--	2026-06-21 00:49
sysfb.h	2.67 KB	-rw-r--r--	2026-06-21 00:49
sysfs.h	17.64 KB	-rw-r--r--	2021-11-01 05:53
syslog.h	1.24 KB	-rw-r--r--	2021-11-01 05:53
sysrq.h	1.96 KB	-rw-r--r--	2021-11-01 05:53
sysv_fs.h	9.03 KB	-rw-r--r--	2021-11-01 05:53
t10-pi.h	1.5 KB	-rw-r--r--	2021-11-01 05:53
task_io_accounting.h	1.13 KB	-rw-r--r--	2021-11-01 05:53
task_io_accounting_ops.h	2.55 KB	-rw-r--r--	2021-11-01 05:53
task_work.h	934 B	-rw-r--r--	2026-06-21 00:49
taskstats_kern.h	957 B	-rw-r--r--	2021-11-01 05:53
tboot.h	3.33 KB	-rw-r--r--	2021-11-01 05:53
tc.h	3.45 KB	-rw-r--r--	2021-11-01 05:53
tca6416_keypad.h	683 B	-rw-r--r--	2026-06-21 00:49
tcp.h	17.14 KB	-rw-r--r--	2026-06-21 00:49
tee_drv.h	18.35 KB	-rw-r--r--	2026-06-21 00:49
textsearch.h	4.75 KB	-rw-r--r--	2026-06-21 00:49
textsearch_fsm.h	1.19 KB	-rw-r--r--	2021-11-01 05:53
tfrc.h	1.68 KB	-rw-r--r--	2021-11-01 05:53
thermal.h	15.44 KB	-rw-r--r--	2026-06-21 00:49
thread_info.h	6.89 KB	-rw-r--r--	2026-06-21 00:49
threads.h	1.28 KB	-rw-r--r--	2021-11-01 05:53
thunderbolt.h	20.78 KB	-rw-r--r--	2021-11-01 05:53
ti-emif-sram.h	5.15 KB	-rw-r--r--	2021-11-01 05:53
ti_wilink_st.h	13.46 KB	-rw-r--r--	2021-11-01 05:53
tick.h	10.05 KB	-rw-r--r--	2026-06-21 00:49
tifm.h	4.66 KB	-rw-r--r--	2021-11-01 05:53
timb_dma.h	1.17 KB	-rw-r--r--	2021-11-01 05:53
timb_gpio.h	717 B	-rw-r--r--	2021-11-01 05:53
time.h	3.14 KB	-rw-r--r--	2021-11-01 05:53
time32.h	1.75 KB	-rw-r--r--	2021-11-01 05:53
time64.h	4.49 KB	-rw-r--r--	2021-11-01 05:53
time_namespace.h	3.82 KB	-rw-r--r--	2021-11-01 05:53
timecounter.h	4.14 KB	-rw-r--r--	2021-11-01 05:53
timekeeper_internal.h	5.33 KB	-rw-r--r--	2021-11-01 05:53
timekeeping.h	7.61 KB	-rw-r--r--	2021-11-01 05:53
timer.h	7.9 KB	-rw-r--r--	2026-06-21 00:49
timerfd.h	508 B	-rw-r--r--	2021-11-01 05:53
timeriomem-rng.h	432 B	-rw-r--r--	2021-11-01 05:53
timerqueue.h	1.4 KB	-rw-r--r--	2026-06-21 00:49
timex.h	6.67 KB	-rw-r--r--	2026-06-21 00:49
tnum.h	3.39 KB	-rw-r--r--	2021-11-01 05:53
topology.h	5.25 KB	-rw-r--r--	2021-11-01 05:53
torture.h	4.48 KB	-rw-r--r--	2026-06-21 00:49
toshiba.h	460 B	-rw-r--r--	2021-11-01 05:53
tpm.h	11.07 KB	-rw-r--r--	2026-06-21 00:49
tpm_command.h	847 B	-rw-r--r--	2021-11-01 05:53
tpm_eventlog.h	6.59 KB	-rw-r--r--	2026-06-21 00:49
trace.h	2.72 KB	-rw-r--r--	2026-06-21 00:49
trace_clock.h	667 B	-rw-r--r--	2021-11-01 05:53
trace_events.h	27.68 KB	-rw-r--r--	2026-06-21 00:49
trace_recursion.h	5.49 KB	-rw-r--r--	2026-06-21 00:49
trace_seq.h	3.94 KB	-rw-r--r--	2026-06-21 00:49
tracefs.h	1018 B	-rw-r--r--	2021-11-01 05:53
tracehook.h	7.97 KB	-rw-r--r--	2021-11-01 05:53
tracepoint-defs.h	2.34 KB	-rw-r--r--	2021-11-01 05:53
tracepoint.h	18 KB	-rw-r--r--	2026-06-21 00:49
transport_class.h	2.58 KB	-rw-r--r--	2026-06-21 00:49
ts-nbus.h	532 B	-rw-r--r--	2021-11-01 05:53
tsacct_kern.h	1.2 KB	-rw-r--r--	2021-11-01 05:53
tty.h	14.52 KB	-rw-r--r--	2021-11-01 05:53
tty_buffer.h	1.28 KB	-rw-r--r--	2021-11-01 05:53
tty_driver.h	15.69 KB	-rw-r--r--	2021-11-01 05:53
tty_flip.h	1.69 KB	-rw-r--r--	2026-06-21 00:49
tty_ldisc.h	8.46 KB	-rw-r--r--	2021-11-01 05:53
tty_port.h	7.24 KB	-rw-r--r--	2021-11-01 05:53
typecheck.h	782 B	-rw-r--r--	2021-11-01 05:53
types.h	5.68 KB	-rw-r--r--	2026-06-21 00:49
u64_stats_sync.h	6.41 KB	-rw-r--r--	2026-06-21 00:49
uacce.h	3.79 KB	-rw-r--r--	2026-06-21 00:49
uaccess.h	13.06 KB	-rw-r--r--	2026-06-21 00:49
ucb1400.h	4.12 KB	-rw-r--r--	2021-11-01 05:53
ucs2_string.h	662 B	-rw-r--r--	2021-11-01 05:53
udp.h	5.3 KB	-rw-r--r--	2026-06-21 00:49
uidgid.h	4.07 KB	-rw-r--r--	2021-11-01 05:53
uio.h	9.1 KB	-rw-r--r--	2026-06-21 00:49
uio_driver.h	4.71 KB	-rw-r--r--	2021-11-01 05:53
umh.h	1.79 KB	-rw-r--r--	2021-11-01 05:53
unicode.h	1.02 KB	-rw-r--r--	2021-11-01 05:53
units.h	2.59 KB	-rw-r--r--	2021-11-01 05:53
uprobes.h	6.05 KB	-rw-r--r--	2026-06-21 00:49
usb.h	78.08 KB	-rw-r--r--	2026-06-21 00:49
usb_usual.h	3.58 KB	-rw-r--r--	2021-11-01 05:53
usbdevice_fs.h	2.18 KB	-rw-r--r--	2021-11-01 05:53
user-return-notifier.h	1.18 KB	-rw-r--r--	2021-11-01 05:53
user.h	22 B	-rw-r--r--	2021-11-01 05:53
user_namespace.h	6.03 KB	-rw-r--r--	2026-06-21 00:49
userfaultfd_k.h	6.44 KB	-rw-r--r--	2021-11-01 05:53
usermode_driver.h	515 B	-rw-r--r--	2021-11-01 05:53
util_macros.h	2.49 KB	-rw-r--r--	2026-06-21 00:49
uts.h	388 B	-rw-r--r--	2021-11-01 05:53
utsname.h	1.78 KB	-rw-r--r--	2021-11-01 05:53
uuid.h	2.34 KB	-rw-r--r--	2021-11-01 05:53
vbox_utils.h	1.75 KB	-rw-r--r--	2021-11-01 05:53
vdpa.h	14.38 KB	-rw-r--r--	2026-06-21 00:49
verification.h	1.77 KB	-rw-r--r--	2021-11-01 05:53
vermagic.h	1.28 KB	-rw-r--r--	2021-11-01 05:53
vexpress.h	297 B	-rw-r--r--	2021-11-01 05:53
vfio.h	8.3 KB	-rw-r--r--	2026-06-21 00:49
vfio_pci_core.h	8.07 KB	-rw-r--r--	2026-06-21 00:49
vfs.h	116 B	-rw-r--r--	2021-11-01 05:53
vga_switcheroo.h	8.62 KB	-rw-r--r--	2021-11-01 05:53
vgaarb.h	3.88 KB	-rw-r--r--	2021-11-01 05:53
vhost_iotlb.h	1.34 KB	-rw-r--r--	2021-11-01 05:53
via-core.h	6.57 KB	-rw-r--r--	2021-11-01 05:53
via-gpio.h	310 B	-rw-r--r--	2021-11-01 05:53
via.h	932 B	-rw-r--r--	2021-11-01 05:53
via_i2c.h	844 B	-rw-r--r--	2021-11-01 05:53
videodev2.h	2.7 KB	-rw-r--r--	2021-11-01 05:53
virtio.h	6.7 KB	-rw-r--r--	2026-06-21 00:49
virtio_byteorder.h	1.46 KB	-rw-r--r--	2021-11-01 05:53
virtio_caif.h	513 B	-rw-r--r--	2021-11-01 05:53
virtio_config.h	16.25 KB	-rw-r--r--	2026-06-21 00:49
virtio_console.h	1.93 KB	-rw-r--r--	2021-11-01 05:53
virtio_dma_buf.h	1.12 KB	-rw-r--r--	2021-11-01 05:53
virtio_net.h	6.01 KB	-rw-r--r--	2026-06-21 00:49
virtio_pci_modern.h	3.25 KB	-rw-r--r--	2021-11-01 05:53
virtio_ring.h	2.95 KB	-rw-r--r--	2021-11-01 05:53
virtio_vsock.h	4.79 KB	-rw-r--r--	2021-11-01 05:53
visorbus.h	12.23 KB	-rw-r--r--	2021-11-01 05:53
vlynq.h	3.22 KB	-rw-r--r--	2021-11-01 05:53
vm_event_item.h	3.46 KB	-rw-r--r--	2021-11-01 05:53
vmacache.h	722 B	-rw-r--r--	2021-11-01 05:53
vmalloc.h	8.4 KB	-rw-r--r--	2026-06-21 00:49
vme.h	5.66 KB	-rw-r--r--	2021-11-01 05:53
vmpressure.h	1.68 KB	-rw-r--r--	2021-11-01 05:53
vmstat.h	14.79 KB	-rw-r--r--	2026-06-21 00:49
vmw_vmci_api.h	2.88 KB	-rw-r--r--	2021-11-01 05:53
vmw_vmci_defs.h	30.03 KB	-rw-r--r--	2026-06-21 00:49
vringh.h	8.62 KB	-rw-r--r--	2021-11-01 05:53
vsc.h	1.87 KB	-rw-r--r--	2026-06-21 00:49
vt.h	611 B	-rw-r--r--	2021-11-01 05:53
vt_buffer.h	1.49 KB	-rw-r--r--	2026-06-21 00:49
vt_kern.h	5.31 KB	-rw-r--r--	2021-11-01 05:53
vtime.h	4.6 KB	-rw-r--r--	2021-11-01 05:53
w1-gpio.h	493 B	-rw-r--r--	2021-11-01 05:53
w1.h	8.93 KB	-rw-r--r--	2021-11-01 05:53
wait.h	42.04 KB	-rw-r--r--	2026-06-21 00:49
wait_bit.h	11.2 KB	-rw-r--r--	2021-11-01 05:53
watch_queue.h	3.82 KB	-rw-r--r--	2026-06-21 00:49
watchdog.h	8.21 KB	-rw-r--r--	2021-11-01 05:53
win_minmax.h	832 B	-rw-r--r--	2021-11-01 05:53
wireless.h	1.57 KB	-rw-r--r--	2026-06-21 00:49
wkup_m3_ipc.h	1.75 KB	-rw-r--r--	2021-11-01 05:53
wl12xx.h	810 B	-rw-r--r--	2021-11-01 05:53
wm97xx.h	10.59 KB	-rw-r--r--	2021-11-01 05:53
wmi.h	1.56 KB	-rw-r--r--	2021-11-01 05:53
workqueue.h	22.44 KB	-rw-r--r--	2026-06-21 00:49
writeback.h	12.83 KB	-rw-r--r--	2021-11-01 05:53
ww_mutex.h	13.11 KB	-rw-r--r--	2021-11-01 05:53
wwan.h	5.13 KB	-rw-r--r--	2021-11-01 05:53
xarray.h	56.45 KB	-rw-r--r--	2026-06-21 00:49
xattr.h	3.88 KB	-rw-r--r--	2021-11-01 05:53
xxhash.h	8.27 KB	-rw-r--r--	2021-11-01 05:53
xz.h	11.16 KB	-rw-r--r--	2021-11-01 05:53
yam.h	2.18 KB	-rw-r--r--	2021-11-01 05:53
z2_battery.h	299 B	-rw-r--r--	2021-11-01 05:53
zconf.h	1.73 KB	-rw-r--r--	2021-11-01 05:53
zlib.h	28.11 KB	-rw-r--r--	2021-11-01 05:53
zorro.h	3.57 KB	-rw-r--r--	2021-11-01 05:53
zpool.h	3.24 KB	-rw-r--r--	2021-11-01 05:53
zsmalloc.h	1.63 KB	-rw-r--r--	2021-11-01 05:53
zstd.h	48.58 KB	-rw-r--r--	2021-11-01 05:53
zutil.h	2.73 KB	-rw-r--r--	2021-11-01 05:53

Rename

/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __LINUX_REGMAP_H
#define __LINUX_REGMAP_H

/*
 * Register map access API
 *
 * Copyright 2011 Wolfson Microelectronics plc
 *
 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
 */

#include <linux/list.h>
#include <linux/rbtree.h>
#include <linux/ktime.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/bug.h>
#include <linux/lockdep.h>
#include <linux/iopoll.h>
#include <linux/fwnode.h>

struct module;
struct clk;
struct device;
struct device_node;
struct i2c_client;
struct i3c_device;
struct irq_domain;
struct mdio_device;
struct slim_device;
struct spi_device;
struct spmi_device;
struct regmap;
struct regmap_range_cfg;
struct regmap_field;
struct snd_ac97;
struct sdw_slave;

/* An enum of all the supported cache types */
enum regcache_type {
	REGCACHE_NONE,
	REGCACHE_RBTREE,
	REGCACHE_COMPRESSED,
	REGCACHE_FLAT,
};

/**
 * struct reg_default - Default value for a register.
 *
 * @reg: Register address.
 * @def: Register default value.
 *
 * We use an array of structs rather than a simple array as many modern devices
 * have very sparse register maps.
 */
struct reg_default {
	unsigned int reg;
	unsigned int def;
};

/**
 * struct reg_sequence - An individual write from a sequence of writes.
 *
 * @reg: Register address.
 * @def: Register value.
 * @delay_us: Delay to be applied after the register write in microseconds
 *
 * Register/value pairs for sequences of writes with an optional delay in
 * microseconds to be applied after each write.
 */
struct reg_sequence {
	unsigned int reg;
	unsigned int def;
	unsigned int delay_us;
};

#define REG_SEQ(_reg, _def, _delay_us) {		\
				.reg = _reg,		\
				.def = _def,		\
				.delay_us = _delay_us,	\
				}
#define REG_SEQ0(_reg, _def)	REG_SEQ(_reg, _def, 0)

/**
 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
 *
 * @map: Regmap to read from
 * @addr: Address to poll
 * @val: Unsigned integer variable to read the value into
 * @cond: Break condition (usually involving @val)
 * @sleep_us: Maximum time to sleep between reads in us (0
 *            tight-loops).  Should be less than ~20ms since usleep_range
 *            is used (see Documentation/timers/timers-howto.rst).
 * @timeout_us: Timeout in us, 0 means never timeout
 *
 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
 * error return value in case of a error read. In the two former cases,
 * the last read value at @addr is stored in @val. Must not be called
 * from atomic context if sleep_us or timeout_us are used.
 *
 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
 */
#define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \
({ \
	int __ret, __tmp; \
	__tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \
			sleep_us, timeout_us, false, (map), (addr), &(val)); \
	__ret ?: __tmp; \
})

/**
 * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs
 *
 * @map: Regmap to read from
 * @addr: Address to poll
 * @val: Unsigned integer variable to read the value into
 * @cond: Break condition (usually involving @val)
 * @delay_us: Time to udelay between reads in us (0 tight-loops).
 *            Should be less than ~10us since udelay is used
 *            (see Documentation/timers/timers-howto.rst).
 * @timeout_us: Timeout in us, 0 means never timeout
 *
 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
 * error return value in case of a error read. In the two former cases,
 * the last read value at @addr is stored in @val.
 *
 * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h.
 *
 * Note: In general regmap cannot be used in atomic context. If you want to use
 * this macro then first setup your regmap for atomic use (flat or no cache
 * and MMIO regmap).
 */
#define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \
({ \
	u64 __timeout_us = (timeout_us); \
	unsigned long __delay_us = (delay_us); \
	ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
	int __ret; \
	for (;;) { \
		__ret = regmap_read((map), (addr), &(val)); \
		if (__ret) \
			break; \
		if (cond) \
			break; \
		if ((__timeout_us) && \
		    ktime_compare(ktime_get(), __timeout) > 0) { \
			__ret = regmap_read((map), (addr), &(val)); \
			break; \
		} \
		if (__delay_us) \
			udelay(__delay_us); \
	} \
	__ret ?: ((cond) ? 0 : -ETIMEDOUT); \
})

/**
 * regmap_field_read_poll_timeout - Poll until a condition is met or timeout
 *
 * @field: Regmap field to read from
 * @val: Unsigned integer variable to read the value into
 * @cond: Break condition (usually involving @val)
 * @sleep_us: Maximum time to sleep between reads in us (0
 *            tight-loops).  Should be less than ~20ms since usleep_range
 *            is used (see Documentation/timers/timers-howto.rst).
 * @timeout_us: Timeout in us, 0 means never timeout
 *
 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read
 * error return value in case of a error read. In the two former cases,
 * the last read value at @addr is stored in @val. Must not be called
 * from atomic context if sleep_us or timeout_us are used.
 *
 * This is modelled after the readx_poll_timeout macros in linux/iopoll.h.
 */
#define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \
({ \
	int __ret, __tmp; \
	__tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \
			sleep_us, timeout_us, false, (field), &(val)); \
	__ret ?: __tmp; \
})

#ifdef CONFIG_REGMAP

enum regmap_endian {
	/* Unspecified -> 0 -> Backwards compatible default */
	REGMAP_ENDIAN_DEFAULT = 0,
	REGMAP_ENDIAN_BIG,
	REGMAP_ENDIAN_LITTLE,
	REGMAP_ENDIAN_NATIVE,
};

/**
 * struct regmap_range - A register range, used for access related checks
 *                       (readable/writeable/volatile/precious checks)
 *
 * @range_min: address of first register
 * @range_max: address of last register
 */
struct regmap_range {
	unsigned int range_min;
	unsigned int range_max;
};

#define regmap_reg_range(low, high) { .range_min = low, .range_max = high, }

/**
 * struct regmap_access_table - A table of register ranges for access checks
 *
 * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges"
 * @n_yes_ranges: size of the above array
 * @no_ranges: pointer to an array of regmap ranges used as "no ranges"
 * @n_no_ranges: size of the above array
 *
 * A table of ranges including some yes ranges and some no ranges.
 * If a register belongs to a no_range, the corresponding check function
 * will return false. If a register belongs to a yes range, the corresponding
 * check function will return true. "no_ranges" are searched first.
 */
struct regmap_access_table {
	const struct regmap_range *yes_ranges;
	unsigned int n_yes_ranges;
	const struct regmap_range *no_ranges;
	unsigned int n_no_ranges;
};

typedef void (*regmap_lock)(void *);
typedef void (*regmap_unlock)(void *);

/**
 * struct regmap_config - Configuration for the register map of a device.
 *
 * @name: Optional name of the regmap. Useful when a device has multiple
 *        register regions.
 *
 * @reg_bits: Number of bits in a register address, mandatory.
 * @reg_stride: The register address stride. Valid register addresses are a
 *              multiple of this value. If set to 0, a value of 1 will be
 *              used.
 * @pad_bits: Number of bits of padding between register and value.
 * @val_bits: Number of bits in a register value, mandatory.
 *
 * @writeable_reg: Optional callback returning true if the register
 *		   can be written to. If this field is NULL but wr_table
 *		   (see below) is not, the check is performed on such table
 *                 (a register is writeable if it belongs to one of the ranges
 *                  specified by wr_table).
 * @readable_reg: Optional callback returning true if the register
 *		  can be read from. If this field is NULL but rd_table
 *		   (see below) is not, the check is performed on such table
 *                 (a register is readable if it belongs to one of the ranges
 *                  specified by rd_table).
 * @volatile_reg: Optional callback returning true if the register
 *		  value can't be cached. If this field is NULL but
 *		  volatile_table (see below) is not, the check is performed on
 *                such table (a register is volatile if it belongs to one of
 *                the ranges specified by volatile_table).
 * @precious_reg: Optional callback returning true if the register
 *		  should not be read outside of a call from the driver
 *		  (e.g., a clear on read interrupt status register). If this
 *                field is NULL but precious_table (see below) is not, the
 *                check is performed on such table (a register is precious if
 *                it belongs to one of the ranges specified by precious_table).
 * @writeable_noinc_reg: Optional callback returning true if the register
 *			supports multiple write operations without incrementing
 *			the register number. If this field is NULL but
 *			wr_noinc_table (see below) is not, the check is
 *			performed on such table (a register is no increment
 *			writeable if it belongs to one of the ranges specified
 *			by wr_noinc_table).
 * @readable_noinc_reg: Optional callback returning true if the register
 *			supports multiple read operations without incrementing
 *			the register number. If this field is NULL but
 *			rd_noinc_table (see below) is not, the check is
 *			performed on such table (a register is no increment
 *			readable if it belongs to one of the ranges specified
 *			by rd_noinc_table).
 * @disable_locking: This regmap is either protected by external means or
 *                   is guaranteed not to be accessed from multiple threads.
 *                   Don't use any locking mechanisms.
 * @lock:	  Optional lock callback (overrides regmap's default lock
 *		  function, based on spinlock or mutex).
 * @unlock:	  As above for unlocking.
 * @lock_arg:	  this field is passed as the only argument of lock/unlock
 *		  functions (ignored in case regular lock/unlock functions
 *		  are not overridden).
 * @reg_read:	  Optional callback that if filled will be used to perform
 *           	  all the reads from the registers. Should only be provided for
 *		  devices whose read operation cannot be represented as a simple
 *		  read operation on a bus such as SPI, I2C, etc. Most of the
 *		  devices do not need this.
 * @reg_write:	  Same as above for writing.
 * @reg_update_bits: Optional callback that if filled will be used to perform
 *		     all the update_bits(rmw) operation. Should only be provided
 *		     if the function require special handling with lock and reg
 *		     handling and the operation cannot be represented as a simple
 *		     update_bits operation on a bus such as SPI, I2C, etc.
 * @read: Optional callback that if filled will be used to perform all the
 *        bulk reads from the registers. Data is returned in the buffer used
 *        to transmit data.
 * @write: Same as above for writing.
 * @max_raw_read: Max raw read size that can be used on the device.
 * @max_raw_write: Max raw write size that can be used on the device.
 * @fast_io:	  Register IO is fast. Use a spinlock instead of a mutex
 *	     	  to perform locking. This field is ignored if custom lock/unlock
 *	     	  functions are used (see fields lock/unlock of struct regmap_config).
 *		  This field is a duplicate of a similar file in
 *		  'struct regmap_bus' and serves exact same purpose.
 *		   Use it only for "no-bus" cases.
 * @max_register: Optional, specifies the maximum valid register address.
 * @wr_table:     Optional, points to a struct regmap_access_table specifying
 *                valid ranges for write access.
 * @rd_table:     As above, for read access.
 * @volatile_table: As above, for volatile registers.
 * @precious_table: As above, for precious registers.
 * @wr_noinc_table: As above, for no increment writeable registers.
 * @rd_noinc_table: As above, for no increment readable registers.
 * @reg_defaults: Power on reset values for registers (for use with
 *                register cache support).
 * @num_reg_defaults: Number of elements in reg_defaults.
 *
 * @read_flag_mask: Mask to be set in the top bytes of the register when doing
 *                  a read.
 * @write_flag_mask: Mask to be set in the top bytes of the register when doing
 *                   a write. If both read_flag_mask and write_flag_mask are
 *                   empty and zero_flag_mask is not set the regmap_bus default
 *                   masks are used.
 * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even
 *                   if they are both empty.
 * @use_relaxed_mmio: If set, MMIO R/W operations will not use memory barriers.
 *                    This can avoid load on devices which don't require strict
 *                    orderings, but drivers should carefully add any explicit
 *                    memory barriers when they may require them.
 * @use_single_read: If set, converts the bulk read operation into a series of
 *                   single read operations. This is useful for a device that
 *                   does not support  bulk read.
 * @use_single_write: If set, converts the bulk write operation into a series of
 *                    single write operations. This is useful for a device that
 *                    does not support bulk write.
 * @can_multi_write: If set, the device supports the multi write mode of bulk
 *                   write operations, if clear multi write requests will be
 *                   split into individual write operations
 *
 * @cache_type: The actual cache type.
 * @reg_defaults_raw: Power on reset values for registers (for use with
 *                    register cache support).
 * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
 * @reg_format_endian: Endianness for formatted register addresses. If this is
 *                     DEFAULT, the @reg_format_endian_default value from the
 *                     regmap bus is used.
 * @val_format_endian: Endianness for formatted register values. If this is
 *                     DEFAULT, the @reg_format_endian_default value from the
 *                     regmap bus is used.
 *
 * @ranges: Array of configuration entries for virtual address ranges.
 * @num_ranges: Number of range configuration entries.
 * @use_hwlock: Indicate if a hardware spinlock should be used.
 * @use_raw_spinlock: Indicate if a raw spinlock should be used.
 * @hwlock_id: Specify the hardware spinlock id.
 * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE,
 *		 HWLOCK_IRQ or 0.
 * @can_sleep: Optional, specifies whether regmap operations can sleep.
 */
struct regmap_config {
	const char *name;

int reg_bits;
	int reg_stride;
	int pad_bits;
	int val_bits;

bool (*writeable_reg)(struct device *dev, unsigned int reg);
	bool (*readable_reg)(struct device *dev, unsigned int reg);
	bool (*volatile_reg)(struct device *dev, unsigned int reg);
	bool (*precious_reg)(struct device *dev, unsigned int reg);
	bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg);
	bool (*readable_noinc_reg)(struct device *dev, unsigned int reg);

bool disable_locking;
	regmap_lock lock;
	regmap_unlock unlock;
	void *lock_arg;

int (*reg_read)(void *context, unsigned int reg, unsigned int *val);
	int (*reg_write)(void *context, unsigned int reg, unsigned int val);
	int (*reg_update_bits)(void *context, unsigned int reg,
			       unsigned int mask, unsigned int val);
	/* Bulk read/write */
	int (*read)(void *context, const void *reg_buf, size_t reg_size,
		    void *val_buf, size_t val_size);
	int (*write)(void *context, const void *data, size_t count);
	size_t max_raw_read;
	size_t max_raw_write;

bool fast_io;

unsigned int max_register;
	const struct regmap_access_table *wr_table;
	const struct regmap_access_table *rd_table;
	const struct regmap_access_table *volatile_table;
	const struct regmap_access_table *precious_table;
	const struct regmap_access_table *wr_noinc_table;
	const struct regmap_access_table *rd_noinc_table;
	const struct reg_default *reg_defaults;
	unsigned int num_reg_defaults;
	enum regcache_type cache_type;
	const void *reg_defaults_raw;
	unsigned int num_reg_defaults_raw;

unsigned long read_flag_mask;
	unsigned long write_flag_mask;
	bool zero_flag_mask;

bool use_single_read;
	bool use_single_write;
	bool use_relaxed_mmio;
	bool can_multi_write;

enum regmap_endian reg_format_endian;
	enum regmap_endian val_format_endian;

const struct regmap_range_cfg *ranges;
	unsigned int num_ranges;

bool use_hwlock;
	bool use_raw_spinlock;
	unsigned int hwlock_id;
	unsigned int hwlock_mode;

bool can_sleep;
};

/**
 * struct regmap_range_cfg - Configuration for indirectly accessed or paged
 *                           registers.
 *
 * @name: Descriptive name for diagnostics
 *
 * @range_min: Address of the lowest register address in virtual range.
 * @range_max: Address of the highest register in virtual range.
 *
 * @selector_reg: Register with selector field.
 * @selector_mask: Bit mask for selector value.
 * @selector_shift: Bit shift for selector value.
 *
 * @window_start: Address of first (lowest) register in data window.
 * @window_len: Number of registers in data window.
 *
 * Registers, mapped to this virtual range, are accessed in two steps:
 *     1. page selector register update;
 *     2. access through data window registers.
 */
struct regmap_range_cfg {
	const char *name;

/* Registers of virtual address range */
	unsigned int range_min;
	unsigned int range_max;

/* Page selector for indirect addressing */
	unsigned int selector_reg;
	unsigned int selector_mask;
	int selector_shift;

/* Data window (per each page) */
	unsigned int window_start;
	unsigned int window_len;
};

struct regmap_async;

typedef int (*regmap_hw_write)(void *context, const void *data,
			       size_t count);
typedef int (*regmap_hw_gather_write)(void *context,
				      const void *reg, size_t reg_len,
				      const void *val, size_t val_len);
typedef int (*regmap_hw_async_write)(void *context,
				     const void *reg, size_t reg_len,
				     const void *val, size_t val_len,
				     struct regmap_async *async);
typedef int (*regmap_hw_read)(void *context,
			      const void *reg_buf, size_t reg_size,
			      void *val_buf, size_t val_size);
typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg,
				  unsigned int *val);
typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
				   unsigned int val);
typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg,
					 unsigned int mask, unsigned int val);
typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
typedef void (*regmap_hw_free_context)(void *context);

/**
 * struct regmap_bus - Description of a hardware bus for the register map
 *                     infrastructure.
 *
 * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
 *	     to perform locking. This field is ignored if custom lock/unlock
 *	     functions are used (see fields lock/unlock of
 *	     struct regmap_config).
 * @write: Write operation.
 * @gather_write: Write operation with split register/value, return -ENOTSUPP
 *                if not implemented  on a given device.
 * @async_write: Write operation which completes asynchronously, optional and
 *               must serialise with respect to non-async I/O.
 * @reg_write: Write a single register value to the given register address. This
 *             write operation has to complete when returning from the function.
 * @reg_update_bits: Update bits operation to be used against volatile
 *                   registers, intended for devices supporting some mechanism
 *                   for setting clearing bits without having to
 *                   read/modify/write.
 * @read: Read operation.  Data is returned in the buffer used to transmit
 *         data.
 * @reg_read: Read a single register value from a given register address.
 * @free_context: Free context.
 * @async_alloc: Allocate a regmap_async() structure.
 * @read_flag_mask: Mask to be set in the top byte of the register when doing
 *                  a read.
 * @reg_format_endian_default: Default endianness for formatted register
 *     addresses. Used when the regmap_config specifies DEFAULT. If this is
 *     DEFAULT, BIG is assumed.
 * @val_format_endian_default: Default endianness for formatted register
 *     values. Used when the regmap_config specifies DEFAULT. If this is
 *     DEFAULT, BIG is assumed.
 * @max_raw_read: Max raw read size that can be used on the bus.
 * @max_raw_write: Max raw write size that can be used on the bus.
 * @free_on_exit: kfree this on exit of regmap
 */
struct regmap_bus {
	bool fast_io;
	regmap_hw_write write;
	regmap_hw_gather_write gather_write;
	regmap_hw_async_write async_write;
	regmap_hw_reg_write reg_write;
	regmap_hw_reg_update_bits reg_update_bits;
	regmap_hw_read read;
	regmap_hw_reg_read reg_read;
	regmap_hw_free_context free_context;
	regmap_hw_async_alloc async_alloc;
	u8 read_flag_mask;
	enum regmap_endian reg_format_endian_default;
	enum regmap_endian val_format_endian_default;
	size_t max_raw_read;
	size_t max_raw_write;
	bool free_on_exit;
};

/*
 * __regmap_init functions.
 *
 * These functions take a lock key and name parameter, and should not be called
 * directly. Instead, use the regmap_init macros that generate a key and name
 * for each call.
 */
struct regmap *__regmap_init(struct device *dev,
			     const struct regmap_bus *bus,
			     void *bus_context,
			     const struct regmap_config *config,
			     struct lock_class_key *lock_key,
			     const char *lock_name);
struct regmap *__regmap_init_i2c(struct i2c_client *i2c,
				 const struct regmap_config *config,
				 struct lock_class_key *lock_key,
				 const char *lock_name);
struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev,
				 const struct regmap_config *config,
				 struct lock_class_key *lock_key,
				 const char *lock_name);
struct regmap *__regmap_init_sccb(struct i2c_client *i2c,
				  const struct regmap_config *config,
				  struct lock_class_key *lock_key,
				  const char *lock_name);
struct regmap *__regmap_init_slimbus(struct slim_device *slimbus,
				 const struct regmap_config *config,
				 struct lock_class_key *lock_key,
				 const char *lock_name);
struct regmap *__regmap_init_spi(struct spi_device *dev,
				 const struct regmap_config *config,
				 struct lock_class_key *lock_key,
				 const char *lock_name);
struct regmap *__regmap_init_spmi_base(struct spmi_device *dev,
				       const struct regmap_config *config,
				       struct lock_class_key *lock_key,
				       const char *lock_name);
struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev,
				      const struct regmap_config *config,
				      struct lock_class_key *lock_key,
				      const char *lock_name);
struct regmap *__regmap_init_w1(struct device *w1_dev,
				 const struct regmap_config *config,
				 struct lock_class_key *lock_key,
				 const char *lock_name);
struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id,
				      void __iomem *regs,
				      const struct regmap_config *config,
				      struct lock_class_key *lock_key,
				      const char *lock_name);
struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97,
				  const struct regmap_config *config,
				  struct lock_class_key *lock_key,
				  const char *lock_name);
struct regmap *__regmap_init_sdw(struct sdw_slave *sdw,
				 const struct regmap_config *config,
				 struct lock_class_key *lock_key,
				 const char *lock_name);
struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
				     const struct regmap_config *config,
				     struct lock_class_key *lock_key,
				     const char *lock_name);
struct regmap *__regmap_init_spi_avmm(struct spi_device *spi,
				      const struct regmap_config *config,
				      struct lock_class_key *lock_key,
				      const char *lock_name);

struct regmap *__devm_regmap_init(struct device *dev,
				  const struct regmap_bus *bus,
				  void *bus_context,
				  const struct regmap_config *config,
				  struct lock_class_key *lock_key,
				  const char *lock_name);
struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c,
				      const struct regmap_config *config,
				      struct lock_class_key *lock_key,
				      const char *lock_name);
struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev,
				      const struct regmap_config *config,
				      struct lock_class_key *lock_key,
				      const char *lock_name);
struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c,
				       const struct regmap_config *config,
				       struct lock_class_key *lock_key,
				       const char *lock_name);
struct regmap *__devm_regmap_init_spi(struct spi_device *dev,
				      const struct regmap_config *config,
				      struct lock_class_key *lock_key,
				      const char *lock_name);
struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev,
					    const struct regmap_config *config,
					    struct lock_class_key *lock_key,
					    const char *lock_name);
struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev,
					   const struct regmap_config *config,
					   struct lock_class_key *lock_key,
					   const char *lock_name);
struct regmap *__devm_regmap_init_w1(struct device *w1_dev,
				      const struct regmap_config *config,
				      struct lock_class_key *lock_key,
				      const char *lock_name);
struct regmap *__devm_regmap_init_mmio_clk(struct device *dev,
					   const char *clk_id,
					   void __iomem *regs,
					   const struct regmap_config *config,
					   struct lock_class_key *lock_key,
					   const char *lock_name);
struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97,
				       const struct regmap_config *config,
				       struct lock_class_key *lock_key,
				       const char *lock_name);
struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw,
				 const struct regmap_config *config,
				 struct lock_class_key *lock_key,
				 const char *lock_name);
struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
					  const struct regmap_config *config,
					  struct lock_class_key *lock_key,
					  const char *lock_name);
struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus,
				 const struct regmap_config *config,
				 struct lock_class_key *lock_key,
				 const char *lock_name);
struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c,
				 const struct regmap_config *config,
				 struct lock_class_key *lock_key,
				 const char *lock_name);
struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi,
					   const struct regmap_config *config,
					   struct lock_class_key *lock_key,
					   const char *lock_name);
/*
 * Wrapper for regmap_init macros to include a unique lockdep key and name
 * for each call. No-op if CONFIG_LOCKDEP is not set.
 *
 * @fn: Real function to call (in the form __[*_]regmap_init[_*])
 * @name: Config variable name (#config in the calling macro)
 **/
#ifdef CONFIG_LOCKDEP
#define __regmap_lockdep_wrapper(fn, name, ...)				\
(									\
	({								\
		static struct lock_class_key _key;			\
		fn(__VA_ARGS__, &_key,					\
			KBUILD_BASENAME ":"				\
			__stringify(__LINE__) ":"			\
			"(" name ")->lock");				\
	})								\
)
#else
#define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL)
#endif

/**
 * regmap_init() - Initialise register map
 *
 * @dev: Device that will be interacted with
 * @bus: Bus-specific callbacks to use with device
 * @bus_context: Data passed to bus-specific callbacks
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.  This function should generally not be called
 * directly, it should be called by bus-specific init functions.
 */
#define regmap_init(dev, bus, bus_context, config)			\
	__regmap_lockdep_wrapper(__regmap_init, #config,		\
				dev, bus, bus_context, config)
int regmap_attach_dev(struct device *dev, struct regmap *map,
		      const struct regmap_config *config);

/**
 * regmap_init_i2c() - Initialise register map
 *
 * @i2c: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_i2c(i2c, config)					\
	__regmap_lockdep_wrapper(__regmap_init_i2c, #config,		\
				i2c, config)

/**
 * regmap_init_mdio() - Initialise register map
 *
 * @mdio_dev: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_mdio(mdio_dev, config)				\
	__regmap_lockdep_wrapper(__regmap_init_mdio, #config,		\
				mdio_dev, config)

/**
 * regmap_init_sccb() - Initialise register map
 *
 * @i2c: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_sccb(i2c, config)					\
	__regmap_lockdep_wrapper(__regmap_init_sccb, #config,		\
				i2c, config)

/**
 * regmap_init_slimbus() - Initialise register map
 *
 * @slimbus: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_slimbus(slimbus, config)				\
	__regmap_lockdep_wrapper(__regmap_init_slimbus, #config,	\
				slimbus, config)

/**
 * regmap_init_spi() - Initialise register map
 *
 * @dev: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_spi(dev, config)					\
	__regmap_lockdep_wrapper(__regmap_init_spi, #config,		\
				dev, config)

/**
 * regmap_init_spmi_base() - Create regmap for the Base register space
 *
 * @dev:	SPMI device that will be interacted with
 * @config:	Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_spmi_base(dev, config)				\
	__regmap_lockdep_wrapper(__regmap_init_spmi_base, #config,	\
				dev, config)

/**
 * regmap_init_spmi_ext() - Create regmap for Ext register space
 *
 * @dev:	Device that will be interacted with
 * @config:	Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_spmi_ext(dev, config)				\
	__regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config,	\
				dev, config)

/**
 * regmap_init_w1() - Initialise register map
 *
 * @w1_dev: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_w1(w1_dev, config)					\
	__regmap_lockdep_wrapper(__regmap_init_w1, #config,		\
				w1_dev, config)

/**
 * regmap_init_mmio_clk() - Initialise register map with register clock
 *
 * @dev: Device that will be interacted with
 * @clk_id: register clock consumer ID
 * @regs: Pointer to memory-mapped IO region
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_mmio_clk(dev, clk_id, regs, config)			\
	__regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config,	\
				dev, clk_id, regs, config)

/**
 * regmap_init_mmio() - Initialise register map
 *
 * @dev: Device that will be interacted with
 * @regs: Pointer to memory-mapped IO region
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_mmio(dev, regs, config)		\
	regmap_init_mmio_clk(dev, NULL, regs, config)

/**
 * regmap_init_ac97() - Initialise AC'97 register map
 *
 * @ac97: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_ac97(ac97, config)					\
	__regmap_lockdep_wrapper(__regmap_init_ac97, #config,		\
				ac97, config)
bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg);

/**
 * regmap_init_sdw() - Initialise register map
 *
 * @sdw: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_sdw(sdw, config)					\
	__regmap_lockdep_wrapper(__regmap_init_sdw, #config,		\
				sdw, config)

/**
 * regmap_init_sdw_mbq() - Initialise register map
 *
 * @sdw: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer to
 * a struct regmap.
 */
#define regmap_init_sdw_mbq(sdw, config)					\
	__regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config,		\
				sdw, config)

/**
 * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
 * to AVMM Bus Bridge
 *
 * @spi: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.
 */
#define regmap_init_spi_avmm(spi, config)					\
	__regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config,		\
				 spi, config)

/**
 * devm_regmap_init() - Initialise managed register map
 *
 * @dev: Device that will be interacted with
 * @bus: Bus-specific callbacks to use with device
 * @bus_context: Data passed to bus-specific callbacks
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  This function should generally not be called
 * directly, it should be called by bus-specific init functions.  The
 * map will be automatically freed by the device management code.
 */
#define devm_regmap_init(dev, bus, bus_context, config)			\
	__regmap_lockdep_wrapper(__devm_regmap_init, #config,		\
				dev, bus, bus_context, config)

/**
 * devm_regmap_init_i2c() - Initialise managed register map
 *
 * @i2c: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_i2c(i2c, config)				\
	__regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config,	\
				i2c, config)

/**
 * devm_regmap_init_mdio() - Initialise managed register map
 *
 * @mdio_dev: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_mdio(mdio_dev, config)				\
	__regmap_lockdep_wrapper(__devm_regmap_init_mdio, #config,	\
				mdio_dev, config)

/**
 * devm_regmap_init_sccb() - Initialise managed register map
 *
 * @i2c: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_sccb(i2c, config)				\
	__regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config,	\
				i2c, config)

/**
 * devm_regmap_init_spi() - Initialise register map
 *
 * @dev: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  The map will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_spi(dev, config)				\
	__regmap_lockdep_wrapper(__devm_regmap_init_spi, #config,	\
				dev, config)

/**
 * devm_regmap_init_spmi_base() - Create managed regmap for Base register space
 *
 * @dev:	SPMI device that will be interacted with
 * @config:	Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_spmi_base(dev, config)				\
	__regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config,	\
				dev, config)

/**
 * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space
 *
 * @dev:	SPMI device that will be interacted with
 * @config:	Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_spmi_ext(dev, config)				\
	__regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config,	\
				dev, config)

/**
 * devm_regmap_init_w1() - Initialise managed register map
 *
 * @w1_dev: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_w1(w1_dev, config)				\
	__regmap_lockdep_wrapper(__devm_regmap_init_w1, #config,	\
				w1_dev, config)
/**
 * devm_regmap_init_mmio_clk() - Initialise managed register map with clock
 *
 * @dev: Device that will be interacted with
 * @clk_id: register clock consumer ID
 * @regs: Pointer to memory-mapped IO region
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_mmio_clk(dev, clk_id, regs, config)		\
	__regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config,	\
				dev, clk_id, regs, config)

/**
 * devm_regmap_init_mmio() - Initialise managed register map
 *
 * @dev: Device that will be interacted with
 * @regs: Pointer to memory-mapped IO region
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_mmio(dev, regs, config)		\
	devm_regmap_init_mmio_clk(dev, NULL, regs, config)

/**
 * devm_regmap_init_ac97() - Initialise AC'97 register map
 *
 * @ac97: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_ac97(ac97, config)				\
	__regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config,	\
				ac97, config)

/**
 * devm_regmap_init_sdw() - Initialise managed register map
 *
 * @sdw: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap. The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_sdw(sdw, config)				\
	__regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config,	\
				sdw, config)

/**
 * devm_regmap_init_sdw_mbq() - Initialise managed register map
 *
 * @sdw: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap. The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_sdw_mbq(sdw, config)			\
	__regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config,   \
				sdw, config)

/**
 * devm_regmap_init_slimbus() - Initialise managed register map
 *
 * @slimbus: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap. The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_slimbus(slimbus, config)			\
	__regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config,	\
				slimbus, config)

/**
 * devm_regmap_init_i3c() - Initialise managed register map
 *
 * @i3c: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  The regmap will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_i3c(i3c, config)				\
	__regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config,	\
				i3c, config)

/**
 * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
 * to AVMM Bus Bridge
 *
 * @spi: Device that will be interacted with
 * @config: Configuration for register map
 *
 * The return value will be an ERR_PTR() on error or a valid pointer
 * to a struct regmap.  The map will be automatically freed by the
 * device management code.
 */
#define devm_regmap_init_spi_avmm(spi, config)				\
	__regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config,	\
				 spi, config)

int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk);
void regmap_mmio_detach_clk(struct regmap *map);
void regmap_exit(struct regmap *map);
int regmap_reinit_cache(struct regmap *map,
			const struct regmap_config *config);
struct regmap *dev_get_regmap(struct device *dev, const char *name);
struct device *regmap_get_device(struct regmap *map);
int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val);
int regmap_raw_write(struct regmap *map, unsigned int reg,
		     const void *val, size_t val_len);
int regmap_noinc_write(struct regmap *map, unsigned int reg,
		     const void *val, size_t val_len);
int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
			size_t val_count);
int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
			int num_regs);
int regmap_multi_reg_write_bypassed(struct regmap *map,
				    const struct reg_sequence *regs,
				    int num_regs);
int regmap_raw_write_async(struct regmap *map, unsigned int reg,
			   const void *val, size_t val_len);
int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
int regmap_raw_read(struct regmap *map, unsigned int reg,
		    void *val, size_t val_len);
int regmap_noinc_read(struct regmap *map, unsigned int reg,
		      void *val, size_t val_len);
int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
		     size_t val_count);
int regmap_update_bits_base(struct regmap *map, unsigned int reg,
			    unsigned int mask, unsigned int val,
			    bool *change, bool async, bool force);

static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
				     unsigned int mask, unsigned int val)
{
	return regmap_update_bits_base(map, reg, mask, val, NULL, false, false);
}

static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
					   unsigned int mask, unsigned int val)
{
	return regmap_update_bits_base(map, reg, mask, val, NULL, true, false);
}

static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
					   unsigned int mask, unsigned int val,
					   bool *change)
{
	return regmap_update_bits_base(map, reg, mask, val,
				       change, false, false);
}

static inline int
regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
			       unsigned int mask, unsigned int val,
			       bool *change)
{
	return regmap_update_bits_base(map, reg, mask, val,
				       change, true, false);
}

static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
				    unsigned int mask, unsigned int val)
{
	return regmap_update_bits_base(map, reg, mask, val, NULL, false, true);
}

int regmap_get_val_bytes(struct regmap *map);
int regmap_get_max_register(struct regmap *map);
int regmap_get_reg_stride(struct regmap *map);
int regmap_async_complete(struct regmap *map);
bool regmap_can_raw_write(struct regmap *map);
size_t regmap_get_raw_read_max(struct regmap *map);
size_t regmap_get_raw_write_max(struct regmap *map);

int regcache_sync(struct regmap *map);
int regcache_sync_region(struct regmap *map, unsigned int min,
			 unsigned int max);
int regcache_drop_region(struct regmap *map, unsigned int min,
			 unsigned int max);
void regcache_cache_only(struct regmap *map, bool enable);
void regcache_cache_bypass(struct regmap *map, bool enable);
void regcache_mark_dirty(struct regmap *map);

bool regmap_check_range_table(struct regmap *map, unsigned int reg,
			      const struct regmap_access_table *table);

int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
			  int num_regs);
int regmap_parse_val(struct regmap *map, const void *buf,
				unsigned int *val);

static inline bool regmap_reg_in_range(unsigned int reg,
				       const struct regmap_range *range)
{
	return reg >= range->range_min && reg <= range->range_max;
}

bool regmap_reg_in_ranges(unsigned int reg,
			  const struct regmap_range *ranges,
			  unsigned int nranges);

static inline int regmap_set_bits(struct regmap *map,
				  unsigned int reg, unsigned int bits)
{
	return regmap_update_bits_base(map, reg, bits, bits,
				       NULL, false, false);
}

static inline int regmap_clear_bits(struct regmap *map,
				    unsigned int reg, unsigned int bits)
{
	return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false);
}

int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits);

/**
 * struct reg_field - Description of an register field
 *
 * @reg: Offset of the register within the regmap bank
 * @lsb: lsb of the register field.
 * @msb: msb of the register field.
 * @id_size: port size if it has some ports
 * @id_offset: address offset for each ports
 */
struct reg_field {
	unsigned int reg;
	unsigned int lsb;
	unsigned int msb;
	unsigned int id_size;
	unsigned int id_offset;
};

#define REG_FIELD(_reg, _lsb, _msb) {		\
				.reg = _reg,	\
				.lsb = _lsb,	\
				.msb = _msb,	\
				}

#define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) {	\
				.reg = _reg,			\
				.lsb = _lsb,			\
				.msb = _msb,			\
				.id_size = _size,		\
				.id_offset = _offset,		\
				}

struct regmap_field *regmap_field_alloc(struct regmap *regmap,
		struct reg_field reg_field);
void regmap_field_free(struct regmap_field *field);

struct regmap_field *devm_regmap_field_alloc(struct device *dev,
		struct regmap *regmap, struct reg_field reg_field);
void devm_regmap_field_free(struct device *dev,	struct regmap_field *field);

int regmap_field_bulk_alloc(struct regmap *regmap,
			     struct regmap_field **rm_field,
			     const struct reg_field *reg_field,
			     int num_fields);
void regmap_field_bulk_free(struct regmap_field *field);
int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap,
				 struct regmap_field **field,
				 const struct reg_field *reg_field,
				 int num_fields);
void devm_regmap_field_bulk_free(struct device *dev,
				 struct regmap_field *field);

int regmap_field_read(struct regmap_field *field, unsigned int *val);
int regmap_field_update_bits_base(struct regmap_field *field,
				  unsigned int mask, unsigned int val,
				  bool *change, bool async, bool force);
int regmap_fields_read(struct regmap_field *field, unsigned int id,
		       unsigned int *val);
int regmap_fields_update_bits_base(struct regmap_field *field,  unsigned int id,
				   unsigned int mask, unsigned int val,
				   bool *change, bool async, bool force);

static inline int regmap_field_write(struct regmap_field *field,
				     unsigned int val)
{
	return regmap_field_update_bits_base(field, ~0, val,
					     NULL, false, false);
}

static inline int regmap_field_force_write(struct regmap_field *field,
					   unsigned int val)
{
	return regmap_field_update_bits_base(field, ~0, val, NULL, false, true);
}

static inline int regmap_field_update_bits(struct regmap_field *field,
					   unsigned int mask, unsigned int val)
{
	return regmap_field_update_bits_base(field, mask, val,
					     NULL, false, false);
}

static inline int
regmap_field_force_update_bits(struct regmap_field *field,
			       unsigned int mask, unsigned int val)
{
	return regmap_field_update_bits_base(field, mask, val,
					     NULL, false, true);
}

static inline int regmap_fields_write(struct regmap_field *field,
				      unsigned int id, unsigned int val)
{
	return regmap_fields_update_bits_base(field, id, ~0, val,
					      NULL, false, false);
}

static inline int regmap_fields_force_write(struct regmap_field *field,
					    unsigned int id, unsigned int val)
{
	return regmap_fields_update_bits_base(field, id, ~0, val,
					      NULL, false, true);
}

static inline int
regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
			  unsigned int mask, unsigned int val)
{
	return regmap_fields_update_bits_base(field, id, mask, val,
					      NULL, false, false);
}

static inline int
regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
				unsigned int mask, unsigned int val)
{
	return regmap_fields_update_bits_base(field, id, mask, val,
					      NULL, false, true);
}

/**
 * struct regmap_irq_type - IRQ type definitions.
 *
 * @type_reg_offset: Offset register for the irq type setting.
 * @type_rising_val: Register value to configure RISING type irq.
 * @type_falling_val: Register value to configure FALLING type irq.
 * @type_level_low_val: Register value to configure LEVEL_LOW type irq.
 * @type_level_high_val: Register value to configure LEVEL_HIGH type irq.
 * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types.
 */
struct regmap_irq_type {
	unsigned int type_reg_offset;
	unsigned int type_reg_mask;
	unsigned int type_rising_val;
	unsigned int type_falling_val;
	unsigned int type_level_low_val;
	unsigned int type_level_high_val;
	unsigned int types_supported;
};

/**
 * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip.
 *
 * @reg_offset: Offset of the status/mask register within the bank
 * @mask:       Mask used to flag/control the register.
 * @type:	IRQ trigger type setting details if supported.
 */
struct regmap_irq {
	unsigned int reg_offset;
	unsigned int mask;
	struct regmap_irq_type type;
};

#define REGMAP_IRQ_REG(_irq, _off, _mask)		\
	[_irq] = { .reg_offset = (_off), .mask = (_mask) }

#define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \
	[_id] = {				\
		.mask = BIT((_id) % (_reg_bits)),	\
		.reg_offset = (_id) / (_reg_bits),	\
	}

#define REGMAP_IRQ_MAIN_REG_OFFSET(arr)				\
	{ .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] }

struct regmap_irq_sub_irq_map {
	unsigned int num_regs;
	unsigned int *offset;
};

/**
 * struct regmap_irq_chip - Description of a generic regmap irq_chip.
 *
 * @name:        Descriptive name for IRQ controller.
 *
 * @main_status: Base main status register address. For chips which have
 *		 interrupts arranged in separate sub-irq blocks with own IRQ
 *		 registers and which have a main IRQ registers indicating
 *		 sub-irq blocks with unhandled interrupts. For such chips fill
 *		 sub-irq register information in status_base, mask_base and
 *		 ack_base.
 * @num_main_status_bits: Should be given to chips where number of meaningfull
 *			  main status bits differs from num_regs.
 * @sub_reg_offsets: arrays of mappings from main register bits to sub irq
 *		     registers. First item in array describes the registers
 *		     for first main status bit. Second array for second bit etc.
 *		     Offset is given as sub register status offset to
 *		     status_base. Should contain num_regs arrays.
 *		     Can be provided for chips with more complex mapping than
 *		     1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
 *		     When used with not_fixed_stride, each one-element array
 *		     member contains offset calculated as address from each
 *		     peripheral to first peripheral.
 * @num_main_regs: Number of 'main status' irq registers for chips which have
 *		   main_status set.
 *
 * @status_base: Base status register address.
 * @mask_base:   Base mask register address.
 * @mask_writeonly: Base mask register is write only.
 * @unmask_base:  Base unmask register address. for chips who have
 *                separate mask and unmask registers
 * @ack_base:    Base ack address. If zero then the chip is clear on read.
 *               Using zero value is possible with @use_ack bit.
 * @wake_base:   Base address for wake enables.  If zero unsupported.
 * @type_base:   Base address for irq type.  If zero unsupported.
 * @virt_reg_base:   Base addresses for extra config regs.
 * @irq_reg_stride:  Stride to use for chips where registers are not contiguous.
 * @init_ack_masked: Ack all masked interrupts once during initalization.
 * @mask_invert: Inverted mask register: cleared bits are masked out.
 * @use_ack:     Use @ack register even if it is zero.
 * @ack_invert:  Inverted ack register: cleared bits for ack.
 * @clear_ack:  Use this to set 1 and 0 or vice-versa to clear interrupts.
 * @wake_invert: Inverted wake register: cleared bits are wake enabled.
 * @type_invert: Invert the type flags.
 * @type_in_mask: Use the mask registers for controlling irq type. For
 *                interrupts defining type_rising/falling_mask use mask_base
 *                for edge configuration and never update bits in type_base.
 * @clear_on_unmask: For chips with interrupts cleared on read: read the status
 *                   registers before unmasking interrupts to clear any bits
 *                   set when they were masked.
 * @not_fixed_stride: Used when chip peripherals are not laid out with fixed
 * 		      stride. Must be used with sub_reg_offsets containing the
 * 		      offsets to each peripheral.
 * @status_invert: Inverted status register: cleared bits are active interrupts.
 * @runtime_pm:  Hold a runtime PM lock on the device when accessing it.
 *
 * @num_regs:    Number of registers in each control bank.
 * @irqs:        Descriptors for individual IRQs.  Interrupt numbers are
 *               assigned based on the index in the array of the interrupt.
 * @num_irqs:    Number of descriptors.
 * @num_type_reg:    Number of type registers.
 * @num_virt_regs:   Number of non-standard irq configuration registers.
 *		     If zero unsupported.
 * @type_reg_stride: Stride to use for chips where type registers are not
 *			contiguous.
 * @handle_pre_irq:  Driver specific callback to handle interrupt from device
 *		     before regmap_irq_handler process the interrupts.
 * @handle_post_irq: Driver specific callback to handle interrupt from device
 *		     after handling the interrupts in regmap_irq_handler().
 * @set_type_virt:   Driver specific callback to extend regmap_irq_set_type()
 *		     and configure virt regs.
 * @irq_drv_data:    Driver specific IRQ data which is passed as parameter when
 *		     driver specific pre/post interrupt handler is called.
 *
 * This is not intended to handle every possible interrupt controller, but
 * it should handle a substantial proportion of those that are found in the
 * wild.
 */
struct regmap_irq_chip {
	const char *name;

unsigned int main_status;
	unsigned int num_main_status_bits;
	struct regmap_irq_sub_irq_map *sub_reg_offsets;
	int num_main_regs;

unsigned int status_base;
	unsigned int mask_base;
	unsigned int unmask_base;
	unsigned int ack_base;
	unsigned int wake_base;
	unsigned int type_base;
	unsigned int *virt_reg_base;
	unsigned int irq_reg_stride;
	bool mask_writeonly:1;
	bool init_ack_masked:1;
	bool mask_invert:1;
	bool use_ack:1;
	bool ack_invert:1;
	bool clear_ack:1;
	bool wake_invert:1;
	bool runtime_pm:1;
	bool type_invert:1;
	bool type_in_mask:1;
	bool clear_on_unmask:1;
	bool not_fixed_stride:1;
	bool status_invert:1;

int num_regs;

const struct regmap_irq *irqs;
	int num_irqs;

int num_type_reg;
	int num_virt_regs;
	unsigned int type_reg_stride;

int (*handle_pre_irq)(void *irq_drv_data);
	int (*handle_post_irq)(void *irq_drv_data);
	int (*set_type_virt)(unsigned int **buf, unsigned int type,
			     unsigned long hwirq, int reg);
	void *irq_drv_data;
};

struct regmap_irq_chip_data;

int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
			int irq_base, const struct regmap_irq_chip *chip,
			struct regmap_irq_chip_data **data);
int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
			       struct regmap *map, int irq,
			       int irq_flags, int irq_base,
			       const struct regmap_irq_chip *chip,
			       struct regmap_irq_chip_data **data);
void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);

int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq,
			     int irq_flags, int irq_base,
			     const struct regmap_irq_chip *chip,
			     struct regmap_irq_chip_data **data);
int devm_regmap_add_irq_chip_fwnode(struct device *dev,
				    struct fwnode_handle *fwnode,
				    struct regmap *map, int irq,
				    int irq_flags, int irq_base,
				    const struct regmap_irq_chip *chip,
				    struct regmap_irq_chip_data **data);
void devm_regmap_del_irq_chip(struct device *dev, int irq,
			      struct regmap_irq_chip_data *data);

int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data);

#else

/*
 * These stubs should only ever be called by generic code which has
 * regmap based facilities, if they ever get called at runtime
 * something is going wrong and something probably needs to select
 * REGMAP.
 */

static inline int regmap_write(struct regmap *map, unsigned int reg,
			       unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_write_async(struct regmap *map, unsigned int reg,
				     unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
				   const void *val, size_t val_len)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg,
					 const void *val, size_t val_len)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_noinc_write(struct regmap *map, unsigned int reg,
				    const void *val, size_t val_len)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
				    const void *val, size_t val_count)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_read(struct regmap *map, unsigned int reg,
			      unsigned int *val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
				  void *val, size_t val_len)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_noinc_read(struct regmap *map, unsigned int reg,
				    void *val, size_t val_len)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
				   void *val, size_t val_count)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg,
					  unsigned int mask, unsigned int val,
					  bool *change, bool async, bool force)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_set_bits(struct regmap *map,
				  unsigned int reg, unsigned int bits)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_clear_bits(struct regmap *map,
				    unsigned int reg, unsigned int bits)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_test_bits(struct regmap *map,
				   unsigned int reg, unsigned int bits)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_field_update_bits_base(struct regmap_field *field,
					unsigned int mask, unsigned int val,
					bool *change, bool async, bool force)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_fields_update_bits_base(struct regmap_field *field,
				   unsigned int id,
				   unsigned int mask, unsigned int val,
				   bool *change, bool async, bool force)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
				     unsigned int mask, unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg,
					   unsigned int mask, unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg,
					   unsigned int mask, unsigned int val,
					   bool *change)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int
regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
			       unsigned int mask, unsigned int val,
			       bool *change)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_write_bits(struct regmap *map, unsigned int reg,
				    unsigned int mask, unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_field_write(struct regmap_field *field,
				     unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_field_force_write(struct regmap_field *field,
					   unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_field_update_bits(struct regmap_field *field,
					   unsigned int mask, unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int
regmap_field_force_update_bits(struct regmap_field *field,
			       unsigned int mask, unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_fields_write(struct regmap_field *field,
				      unsigned int id, unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_fields_force_write(struct regmap_field *field,
					    unsigned int id, unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int
regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
			  unsigned int mask, unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int
regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id,
				unsigned int mask, unsigned int val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_get_val_bytes(struct regmap *map)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_get_max_register(struct regmap *map)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_get_reg_stride(struct regmap *map)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regcache_sync(struct regmap *map)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regcache_sync_region(struct regmap *map, unsigned int min,
				       unsigned int max)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regcache_drop_region(struct regmap *map, unsigned int min,
				       unsigned int max)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline void regcache_cache_only(struct regmap *map, bool enable)
{
	WARN_ONCE(1, "regmap API is disabled");
}

static inline void regcache_cache_bypass(struct regmap *map, bool enable)
{
	WARN_ONCE(1, "regmap API is disabled");
}

static inline void regcache_mark_dirty(struct regmap *map)
{
	WARN_ONCE(1, "regmap API is disabled");
}

static inline void regmap_async_complete(struct regmap *map)
{
	WARN_ONCE(1, "regmap API is disabled");
}

static inline int regmap_register_patch(struct regmap *map,
					const struct reg_sequence *regs,
					int num_regs)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline int regmap_parse_val(struct regmap *map, const void *buf,
				unsigned int *val)
{
	WARN_ONCE(1, "regmap API is disabled");
	return -EINVAL;
}

static inline struct regmap *dev_get_regmap(struct device *dev,
					    const char *name)
{
	return NULL;
}

static inline struct device *regmap_get_device(struct regmap *map)
{
	WARN_ONCE(1, "regmap API is disabled");
	return NULL;
}

#endif